YARR issueshttps://gitlab.cern.ch/YARR/YARR/-/issues2023-12-18T23:31:01+01:00https://gitlab.cern.ch/YARR/YARR/-/issues/73Fast and robust S-curve "fitter"2023-12-18T23:31:01+01:00Maurice Garcia-SciveresFast and robust S-curve "fitter"Calculate the S-cure mean and sigma without fitting. Use bin-by-bin derivative of s-curve, which is a Gaussian, Mean is
mean = sum{x.p(x)} = 0.5 + sum{i.(B(i+1)-B(i))}i=0,N-1 / sum{B(i+1)-B(i)}i=0,N-1,
where i is bin number, B(i) b...Calculate the S-cure mean and sigma without fitting. Use bin-by-bin derivative of s-curve, which is a Gaussian, Mean is
mean = sum{x.p(x)} = 0.5 + sum{i.(B(i+1)-B(i))}i=0,N-1 / sum{B(i+1)-B(i)}i=0,N-1,
where i is bin number, B(i) bin contents, N is number of bins, and I assume x = bin number + 0.5
mean = 0.5 + [ N.B(N) - sum{B(i)}i=1,N-1 ] / sum{B(i)}i=1,N-1
Noting that sum{B(i)}i=1,N-1 is total histogram contents, C, minus B(N),
mean = 0.5 + [ (N+1)B(N) - C ] / ( C - B(N) )
Similarly, sigma = RMS = sqrt[ sum(x^2.p(x)) - mean^2 ]RD53B Implementation Advancedhttps://gitlab.cern.ch/YARR/YARR/-/issues/72RD53B FEscope scan2020-09-03T01:03:03+02:00Maurice Garcia-SciveresRD53B FEscope scanImplement a true PTOT threshold scan: fix injection and vary threshold. For each threshold value inject and read PTOT and PTOA.
For each hit, plot x=PTOA, y=threshold and x=PTOA+PTOT, y=threshold for individual pixels. This gives a scop...Implement a true PTOT threshold scan: fix injection and vary threshold. For each threshold value inject and read PTOT and PTOA.
For each hit, plot x=PTOA, y=threshold and x=PTOA+PTOT, y=threshold for individual pixels. This gives a scope plot of the 2nd stage output. Plotting this in a 2D histo with fine binning will be equivalent to dot display with infinite persistence on the scope. Plot also x=<PTOA>, y=threshold and x=<PTOA+PTOT>, y=threshold for all injections at a given threshold, which is equivalent to scope averaging mode.RD53B Implementation Advancedhttps://gitlab.cern.ch/YARR/YARR/-/issues/71RD53B NOCC and NOCC vs. threshold scans2020-09-03T01:02:31+02:00Maurice Garcia-SciveresRD53B NOCC and NOCC vs. threshold scansImplement regular noise occupancy scan using regular readout. Send triggers without any injection and count hits coming out. Noise hits are low ToT so they should not be affected by the ToT bug. It would be good to fill 7/8 of the ToT me...Implement regular noise occupancy scan using regular readout. Send triggers without any injection and count hits coming out. Noise hits are low ToT so they should not be affected by the ToT bug. It would be good to fill 7/8 of the ToT memories for this scan and keep them filled to have low current. The 8th memory would then be the one collecting noise hits.RD53B Implementation Advancedhttps://gitlab.cern.ch/YARR/YARR/-/issues/52RD53B: Two calibration slopes2020-09-15T01:12:54+02:00Timon HeimRD53B: Two calibration slopesRD53B has two Vcal slopes, need to implement those to be able to use them.RD53B has two Vcal slopes, need to implement those to be able to use them.RD53B Implementation Advancedhttps://gitlab.cern.ch/YARR/YARR/-/issues/101Build integration with tdaq2023-10-26T18:04:05+02:00Bruce Joseph GallopBuild integration with tdaqEventually we want to build against tdaq libraries. This should always be optional so that it's not required for a test system.
The problem is that tdaq cmake involves custom cmake includes which seem to take over much of the process. I...Eventually we want to build against tdaq libraries. This should always be optional so that it's not required for a test system.
The problem is that tdaq cmake involves custom cmake includes which seem to take over much of the process. Is there a way to make this optional and at the same time keep much of the build common. For instance, could there be a top-level cmake with tdaq integration that sets up library paths for the rest of the build?Use TDAQ build system and packageshttps://gitlab.cern.ch/YARR/YARR/-/issues/122CMAKE and library overhaul2023-10-26T18:04:05+02:00Timon HeimCMAKE and library overhaulRelated to !413 and #118
Tasks to be performed on release candidate branch for v1.4: tbd
List of tasks to be performed:
- [x] resolve cyclic dependencies
- [ ] possibility to compile w/o any library except Yarr and Util
- [ ] bump c...Related to !413 and #118
Tasks to be performed on release candidate branch for v1.4: tbd
List of tasks to be performed:
- [x] resolve cyclic dependencies
- [ ] possibility to compile w/o any library except Yarr and Util
- [ ] bump cmake version
- [ ] bump tbb version
- [ ] external package handling (FELIX, Rogue), specifically compiling against FELIX from TDAQ library or cvfsv1.4https://gitlab.cern.ch/YARR/YARR/-/issues/244Fix buffering of command packets via netio-watermark option instead of aggreg...2024-03-29T01:09:30+01:00Angira RastogiFix buffering of command packets via netio-watermark option instead of aggregation from YARRNeeds to be understood...Needs to be understood...Angira RastogiAngira Rastogihttps://gitlab.cern.ch/YARR/YARR/-/issues/243Blocking flush method with a user callback to remove ad hoc sleep time in isC...2024-03-29T01:05:47+01:00Angira RastogiBlocking flush method with a user callback to remove ad hoc sleep time in isCmdEmpty() of FelixTxCoreNeed to be followed up with TDAQ...Need to be followed up with TDAQ...Angira RastogiAngira Rastogihttps://gitlab.cern.ch/YARR/YARR/-/issues/242Install Mellanox network card on the host PC and test ethernet interface for ...2024-03-29T01:02:06+01:00Angira RastogiInstall Mellanox network card on the host PC and test ethernet interface for YARR scansAim to test running two FELIX cards installed on the same host PC where one of them runs with the ethernet interface while the other one uses Mellanox card for RDMA.Aim to test running two FELIX cards installed on the same host PC where one of them runs with the ethernet interface while the other one uses Mellanox card for RDMA.Angira RastogiAngira Rastogihttps://gitlab.cern.ch/YARR/YARR/-/issues/241Run YARR calibration scans with felix-star on ALMA9 machine2024-03-29T00:58:22+01:00Angira RastogiRun YARR calibration scans with felix-star on ALMA9 machineTo test:
1) Running felix-star server on centos7 (SW: 5.0.2, driver: 4.15, FW: current release) + YARR scans on ALMA9 => via different host PCs
2) Running felix-star server on ALMA9 (SW: 5.0.3, driver: 4.15, FW: current release) + YARR ...To test:
1) Running felix-star server on centos7 (SW: 5.0.2, driver: 4.15, FW: current release) + YARR scans on ALMA9 => via different host PCs
2) Running felix-star server on ALMA9 (SW: 5.0.3, driver: 4.15, FW: current release) + YARR scans on ALMA9 => on the same PCAngira RastogiAngira Rastogihttps://gitlab.cern.ch/YARR/YARR/-/issues/240FW-trigger generation doesn't work from any downlinks except 02024-03-29T00:51:45+01:00Angira RastogiFW-trigger generation doesn't work from any downlinks except 0See - [FLXUSERS-682](https://its.cern.ch/jira/browse/FLXUSERS-682)See - [FLXUSERS-682](https://its.cern.ch/jira/browse/FLXUSERS-682)Angira RastogiAngira Rastogihttps://gitlab.cern.ch/YARR/YARR/-/issues/239Figure out the lane mapping for down elinks from different DPs for zaza board...2024-03-29T00:47:39+01:00Angira RastogiFigure out the lane mapping for down elinks from different DPs for zaza board v0 when running with felix-starNot able to configure the FE chip while running YARR calibration scans from display ports other than 2 (downlink=0) and 3 (downlink=2).
Lane mapping provided from Zaza seems inconsistent with enabled links for felix-toflx process.Not able to configure the FE chip while running YARR calibration scans from display ports other than 2 (downlink=0) and 3 (downlink=2).
Lane mapping provided from Zaza seems inconsistent with enabled links for felix-toflx process.Angira RastogiAngira Rastogihttps://gitlab.cern.ch/YARR/YARR/-/issues/238More flexible trigger pattern generator2024-03-28T11:17:29+01:00Bruce Joseph GallopMore flexible trigger pattern generatorNB I think this is a FrontEnd specific thing, but there might be some restricted list of common things that can be done.
This does also imply that the current 32 words in TxCore are not sufficient.
The most common patterns in ITSDAQ ar...NB I think this is a FrontEnd specific thing, but there might be some restricted list of common things that can be done.
This does also imply that the current 32 words in TxCore are not sufficient.
The most common patterns in ITSDAQ are things like:
* cal pulse + delay + trigger (already present)
* BCR + delay + cal pulse + delay + trigger
* cal pulse + delay + trigger + delay + trigger (ie the calibration pulse is timed for one trigger and not the other)
* n * (trigger + delay) (n 2 to at least 8, but maybe larger)
For more diagnostics, ITSDAQ has a fully customizable (from json) trigger pattern generator.
As an example (not a useful pattern) from itsdaq:
```
"command": [
"idle 5",
"l0 1111 2",
"l0 0011 4",
"l0 1001 +14",
"l0 1000 +1",
"l0 1000 +1 BCR",
"fast 2 2",
"fast 3 2",
"fast 6 2",
"fast 10 2",
"reg abc read 6",
"reg abc read 7",
"reg abc read 8",
"reg abc read 0x46",
"idle 3",
"reg abc write 2 0x01001067",
"reg abc read 2",
"reg abc write 2 0x03c01067",
"reg abc read 2",
"reg abc write 2 0x02001067",
"reg abc read 2",
"idle 2"]
```
@otoldaie , @ztaohttps://gitlab.cern.ch/YARR/YARR/-/issues/237Fix the connection timeout of the socket for checkChannel()2024-03-26T23:23:17+01:00Angira RastogiFix the connection timeout of the socket for checkChannel()Need to dig into the actual time until when the connection from felix-client to netio socket lasts. Right now, we have a placeholder time of 5 secs [here](https://gitlab.cern.ch/YARR/YARR/-/blob/devel/src/libFelixClient/FelixTxCore.cpp#L...Need to dig into the actual time until when the connection from felix-client to netio socket lasts. Right now, we have a placeholder time of 5 secs [here](https://gitlab.cern.ch/YARR/YARR/-/blob/devel/src/libFelixClient/FelixTxCore.cpp#L64). After this, the checkChannel() can send another send_data() call to re-establish the connection.
However, something to think about later is that if such a check is needed at all once YARR is integrated into the TDAQ state-machine like environment.Angira RastogiAngira Rastogihttps://gitlab.cern.ch/YARR/YARR/-/issues/236Make the sleep time in isCmdEmpty() of FelixTxCore configurable2024-03-29T01:07:30+01:00Angira RastogiMake the sleep time in isCmdEmpty() of FelixTxCore configurableFor FELIX test setups which do not have other hidden latencies in the DAQ chain, should we make the `sleep time` in isCmdEmpty() [here](https://gitlab.cern.ch/YARR/YARR/-/blob/devel/src/libFelixClient/FelixTxCore.cpp#L186) a configurable...For FELIX test setups which do not have other hidden latencies in the DAQ chain, should we make the `sleep time` in isCmdEmpty() [here](https://gitlab.cern.ch/YARR/YARR/-/blob/devel/src/libFelixClient/FelixTxCore.cpp#L186) a configurable parameter from the controller config? Analogous to the flushWaitTime parameter [here](https://gitlab.cern.ch/YARR/YARR/-/blob/devel/configs/controller/felix_client_pixels.json#L29) for FelixRxCore.
This will enable faster configuration for multi-chip or multi-module tests, until we can get rid of this manual wait time while flushing the buffers completely. This can be possible once the flush method of send_data() in felix-star becomes completely blocking with a user callback to check on the status.Angira RastogiAngira Rastogihttps://gitlab.cern.ch/YARR/YARR/-/issues/235Running eye diagram scans for FELIX-based readout2024-03-26T22:01:36+01:00Angira RastogiRunning eye diagram scans for FELIX-based readoutAim to create a useful utility script for users which scans over the important chip register settings to get the most optimum configuration for reading out data from FE. To be designed based on the soft error counters of the FELIX firmware.Aim to create a useful utility script for users which scans over the important chip register settings to get the most optimum configuration for reading out data from FE. To be designed based on the soft error counters of the FELIX firmware.Angira RastogiLaura Clare NoslerAngira Rastogihttps://gitlab.cern.ch/YARR/YARR/-/issues/234Configure FELIX registers for firmware-based trigger generation during the sc...2024-03-26T21:56:33+01:00Angira RastogiConfigure FELIX registers for firmware-based trigger generation during the scan with felix-starTo get rid of running an extra configuration script, before the actual scan, which sets the FELIX registers with the calibration injection and trigger sequence for each scan- and FE-type. This step can be automated through the scanConsol...To get rid of running an extra configuration script, before the actual scan, which sets the FELIX registers with the calibration injection and trigger sequence for each scan- and FE-type. This step can be automated through the scanConsole command, based on the controller type, the front-end type from connectivity file and the scan config.Angira RastogiLaura Clare NoslerAngira Rastogihttps://gitlab.cern.ch/YARR/YARR/-/issues/233Reading chip registers with FELIX2024-03-26T21:45:33+01:00Angira RastogiReading chip registers with FELIXThis is a very important step towards running full module electrical QC tests at LLS sites with a FELIX setup.This is a very important step towards running full module electrical QC tests at LLS sites with a FELIX setup.Angira RastogiAngira Rastogihttps://gitlab.cern.ch/YARR/YARR/-/issues/232Test data transmission with ITkPix triplet module using channel-bonding FELIX...2024-03-26T21:41:35+01:00Angira RastogiTest data transmission with ITkPix triplet module using channel-bonding FELIX firmware for 4-lane readoutNew FELIX firmware exists which supports multi-lane readout. Need to test running YARR calibrations with this new firmware.New FELIX firmware exists which supports multi-lane readout. Need to test running YARR calibrations with this new firmware.Angira RastogiAngira Rastogihttps://gitlab.cern.ch/YARR/YARR/-/issues/231Running data merging with ITkPix quad module V22024-03-26T21:37:52+01:00Angira RastogiRunning data merging with ITkPix quad module V2Currently, we are unable to get "DECODING LINK ALIGNMENT" of the V2 module with FELIX test stand. Based on discussions with Sasha, this issue has been seen before at other sites while running with a V1.1 module as well. It was traced bac...Currently, we are unable to get "DECODING LINK ALIGNMENT" of the V2 module with FELIX test stand. Based on discussions with Sasha, this issue has been seen before at other sites while running with a V1.1 module as well. It was traced back to the R1 & R2 resistors on data adapter card which are not needed. Alternatively, once needs to understand the optoboard equalizer settings.Angira RastogiAngira Rastogi