Missing chip configuration files
I'm experiencing some issues with the chip config files for module 20UPGM22210157. When I pull this module on my LDB, I get the following error:
2025-02-13 13:28:33 INFO [localdb][create_configs] Getting layer-dependent config from module SN... [GET /create_configs] qc.py:245
[13:28:33] WARNING Not able to generate config for chip 0x144c6. core.py:195
Chip configs might not be complete.
WARNING Not able to generate config for chip 0x144d7. core.py:195
Chip configs might not be complete.
2025-02-13 13:28:34 INFO [localdb][create_configs] new chip config 67ac7c5ffee0ecffc94b5e8b with a new revision 67adf382421751a3c7a13673 saved to qc.py:310
mongodb. [GET /create_configs]
INFO [localdb][create_configs] new chip config 67ac7c5ffee0ecffc94b5e8d with a new revision 67adf382421751a3c7a13674 saved to qc.py:310
mongodb. [GET /create_configs]
[13:28:34] WARNING Not able to generate config for chip 0x144c6. core.py:195
Chip configs might not be complete.
WARNING Not able to generate config for chip 0x144d7. core.py:195
Chip configs might not be complete.
INFO [localdb][create_configs] new chip config 67ac7c5ffee0ecffc94b5e8f with a new revision 67adf382421751a3c7a13675 saved to qc.py:310
mongodb. [GET /create_configs]
INFO [localdb][create_configs] new chip config 67ac7c5ffee0ecffc94b5e91 with a new revision 67adf382421751a3c7a13676 saved to qc.py:310
mongodb. [GET /create_configs]
WARNING Not able to generate config for chip 0x144c6. core.py:195
Chip configs might not be complete.
WARNING Not able to generate config for chip 0x144d7. core.py:195
Chip configs might not be complete.
INFO [localdb][create_configs] new chip config 67ac7c60fee0ecffc94b5e93 with a new revision 67adf382421751a3c7a13677 saved to qc.py:310
mongodb. [GET /create_configs]
INFO [localdb][create_configs] new chip config 67ac7c60fee0ecffc94b5e95 with a new revision 67adf382421751a3c7a13678 saved to qc.py:310
mongodb. [GET /create_configs]
INFO [localdb][__init__] ScanCheckoutManager: component_sn = 20UPGM22210157, module_sn = None, stage_name = checkouter.py:58
MODULE/INITIAL_WARM [GET /component]
On the PDB, I noticed that chip 0x144c8 has all the configs, chips 0x144c6 and 0x144d7 only have warm config, while no configs are uploaded for the other chip.