# Summary
* Add missing absl headers to installation (required for OpcScaUa server/ScaSoftware)
* Update regmap/flxcard/ftools
# Details
Package: felix_star
Repository: https://gitlab.cern.ch/atlas-tdaq-felix/felix-star
Old hash: fb7ba6ebb68571d0a925d1c45dab6eb3ac341065
New hash: c62fdaf68230e9affb809a55eee9b03a8116b39a
Commits:
c62fdaf6 Merge branch 'fix-elink-enabled-52x' into '5.2.x'
b516bc52 Fix elink enabled after change in regmap
Package: flxcard
Repository: https://gitlab.cern.ch/atlas-tdaq-felix/flxcard
Old hash: 5030cf69123e29c84c0d33bae4e61425d31ba8bb
New hash: 02c2a0ad0b7c40221c3cdb05806662a1fa2112d8
Commits:
5c39e664 Merge branch 'FLX-2609' into 'master'
7bc2632a [flxcard] regmap submodule for this branch
d8f46500 [flxcard] flx-info: new (register) layout for e-link error counters
e13df020 Merge branch 'FLX-2612' into 'master'
96e39902 Added clkout8 of the Si5345, 40.079MHz. This will also enable clkout8 on the Si5345A in case of 240 MHz refclk (FULL/GBT) but this is no problem
cd70b2f8 Merge branch 'FLX-2610' into 'master'
b2129f0f [flxcard] regmap: MROD registers have been removed
4f691521 Merge branch 'master' of ssh://gitlab.cern.ch:7999/atlas-tdaq-felix/flxcard
29c6113f [ftools] flx-info ttc: fix typo in output
21a33ea1 Merge branch 'docs' into 'master'
f9fc882f Docs
Package: ftools
Repository: https://gitlab.cern.ch/atlas-tdaq-felix/ftools
Old hash: 9ca49638b475f4f0bcb4fade994109eff99be9e8
New hash: 4d4dee07ac842d00b3e52439a9115289a5c5e5bd
Commits:
6573bfa7 [ftools] fpepo: fix FlxCard::card_open() 'ignore_version' (RM4/5) parameter
f5b22471 [ftools] update submodules
708bc445 [ftools] oops in detectLpGbtVersion() ('version' defined as bool instead of int)
391760f6 [ftools] ic.h/cpp: detectLpGbtV1() renamed to detectLpGbtVersion() returning lpGBT version number (or -1 for GBTX); apply to 'flpgbt' tools
Package: regmap
Repository: https://gitlab.cern.ch/atlas-tdaq-felix/regmap
Old hash: a665d931e8573cb7b54da60dd6b262765a14477f
New hash: c7f449a989cca4bdd97ca78dc8058b324477202d
Commits:
5683e375 Merge branch 'FLX-2609' into 'master'
318c4404 Added value to trigger bitfields
d0099999 Renamed register LINK_ERRORS => ELINK_ERRORS_EGROUP_xx_xx
ab06ba5c Split error registers into 8b counters, 2 counters per e-grou
e844619e Merge branch 'FLX-2532' into 'master'
4b66b803 Changed the default value of LINK_FULLMODE_LTI to 0xFFFFFF to address FLX-2503
46587bb0 Extended address field to 16 bits and added RESET_HITGEN bit
f8b00abc Added registers for FLX-2532 (FELIG_PIXEL), removed FEI4 and FELIX_MROD registers, and some FELIG PICXO related registers (FLX-2605) and added some bitfields for FELIG_STRIP
f348e666 Pushed regmap version to 5.4