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Created date
Resolve FLX-1886 "Phase2/ flx182 virtual network"
!499
· created
Aug 09, 2023
by
Frans Schreuder
updated
May 24, 2024
Draft: Implemented a very simple IDLE detection circuit to see whether a HDLC e-link is aligned.
!516
· created
Nov 16, 2023
by
Frans Schreuder
updated
Nov 16, 2023
Draft: phase2/FLX-1592_feligFLX712_ITkStripsEmu_2024
!539
· created
Mar 26, 2024
by
Frans Schreuder
2
updated
Aug 29, 2024
Draft: connected lti rx to tx channel to front-end. added a select_output variable...
!551
· created
May 15, 2024
by
Frans Schreuder
updated
May 23, 2024
Draft: Resolve FLX-2417 "Phase2/ linksharingmultiplexing"
!572
· created
Jul 18, 2024
by
Marius Wensing
updated
Jul 24, 2024
Draft: TB skips BC-gating and ASIC reg RW masking checks when not included in the...
!575
· created
Jul 31, 2024
by
Frans Schreuder
updated
Jul 31, 2024
Stop Vivado GUI at import script
!576
· created
Jul 31, 2024
by
Frans Schreuder
updated
Jul 31, 2024
Added condition for GBT_CHANNEL_DISABLE in lpgbt wrapper and decoding gearbox
!578
· created
Sep 06, 2024
by
Frans Schreuder
updated
Sep 06, 2024
