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Created date
Added support for NSW 16-bit (8+8 alternating bits) E-Link in GBT mode
!322
· created
Dec 22, 2021
by
Frans Schreuder
Merged
updated
Feb 25, 2022
Resolve FLX-1534 "Realignmentstatusreg"
!323
· created
Jan 10, 2022
by
Frans Schreuder
release-4.10
Merged
updated
Jan 11, 2022
Add UVVM library as a git submodule, and compile it during Gitlab CI pipelines
!324
· created
Feb 03, 2022
by
Frans Schreuder
Merged
updated
Feb 03, 2022
Added LpGBT support for VC709
!325
· created
Feb 03, 2022
by
Marco Trovato
Merged
5
Approved
updated
Feb 23, 2022
Added VC709 IP core for full mode transceiver (cpll). Include wrapper VHDL...
!326
· created
Feb 08, 2022
by
Frans Schreuder
phase2/master_FLX-1533_VC709LPGBT
Merged
20
updated
Feb 11, 2022
Added register to enable 32B start-of-chunk checking in FULL mode. Fix...
!327
· created
Feb 09, 2022
by
Frans Schreuder
Merged
updated
Feb 24, 2022
Combined GBT wrapper for V7 and KCU into one file
!328
· created
Feb 14, 2022
by
Frans Schreuder
phase2/master_FLX-1533_VC709LPGBT
Merged
12
updated
Feb 18, 2022
Added L1A driven FULL mode emulator
!329
· created
Feb 14, 2022
by
Frans Schreuder
Merged
updated
Feb 24, 2022
Resolve FLX-1810 "L1a driven emulator"
!330
· created
Feb 15, 2022
by
Frans Schreuder
release-4.10
Merged
updated
Feb 24, 2022
Added FELIG NSW packet generator
!331
· created
Feb 22, 2022
by
Radu Mihai Coliban
phase2/feligFLX712_FLX-1453
Merged
updated
Feb 23, 2022
Uplink Fifo in reset state, no data to decoding module
!332
· created
Feb 23, 2022
by
Marco Trovato
Merged
3
updated
Feb 24, 2022
Release 4.10
!333
· created
Feb 24, 2022
by
Frans Schreuder
master
Merged
updated
Mar 01, 2022
Removed files that were used in phase1, but are unused in Phase 2. FELIX_MROD...
!334
· created
Feb 24, 2022
by
Frans Schreuder
Merged
2
updated
Mar 01, 2022
Preliminary instantiation of core1990 in link wrapper. There is no support yet...
!335
· created
Mar 01, 2022
by
Frans Schreuder
phase2/FLX-1769_AddGBTForVCU128
Merged
updated
Mar 02, 2022
Pushed firmware version to rm-4.11
!336
· created
Mar 02, 2022
by
Frans Schreuder
master
Merged
updated
Mar 03, 2022
Increased channel fifo size for all flavours, but depending on flavour was 2kB...
!337
· created
Mar 02, 2022
by
Frans Schreuder
Merged
updated
Mar 03, 2022
Moved BUSY for the Wupper FIFO into WupperFifos (was in CRToHost) and fixed...
!338
· created
Mar 03, 2022
by
Frans Schreuder
Merged
updated
Mar 04, 2022
conditionally jinja-generate register statements according to fw_modes tag in...
!339
· created
Mar 11, 2022
by
Frans Schreuder
Merged
updated
Mar 15, 2022
Resolve FLX-1831
!340
· created
Mar 15, 2022
by
Ricardo Luz
master
Merged
updated
Mar 16, 2022
Updated fullmore 4.8gbps core xci using the correct rx linerate (4.8 instead of 9.6)
!341
· created
Mar 15, 2022
by
Alessandro Thea
Merged
6
updated
Mar 18, 2022
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