Merge requests · atlas-tdaq-felix / firmware

Merge trains

Phase2/master

!175 · created Sep 23, 2020 by Frans Schreuder phase2/LpGBTUpgrade
- Merged
- 4
updated Sep 24, 2020
Phase2/phase1 merge

!174 · created Sep 21, 2020 by Frans Schreuder
- Merged
- 1
updated Sep 22, 2020
Phase2/endeavour pinzino 5 23

!173 · created Sep 21, 2020 by Nico Giangiacomi
- Merged
- Approved
updated Sep 21, 2020
Small fix for HDLC Decoder

!172 · created Sep 15, 2020 by Nico Giangiacomi phase2/AddEncoder8b10b
- Closed
updated Sep 21, 2020
Phase2/add encoder8b10b

!171 · created Sep 03, 2020 by Frans Schreuder phase2/ConnectlpGBT
- Merged
- 1
updated Sep 05, 2020
Phase2/connectlp gbt

!170 · created Sep 02, 2020 by Frans Schreuder
updated Sep 08, 2020
Resolve FLX-1105 "Bchan emu"

!169 · created Sep 01, 2020 by Alessandra Camplani master
- Closed
- 2
updated Sep 23, 2020
Fix the bug where firmware with GBT_NUM>4 fails to synthesize

!168 · created Aug 29, 2020 by Elena Zhivun master
updated Sep 09, 2020
Fix the issue where firmware with GBT_NUM>4 fails synthesis

!167 · created Aug 29, 2020 by Elena Zhivun master
- Closed
updated Aug 29, 2020
DUNE: per-link Customizable SUPER-CHUNK-FACTOR

!166 · created Aug 28, 2020 by Filiberto Bonini master
- Closed
- 12
updated Nov 12, 2020
Phase2/rm5.0

!165 · created Aug 19, 2020 by Frans Schreuder
updated Aug 19, 2020
Resolve FLX-1265 "Reorderfromhostdma"

!164 · created Jul 30, 2020 by Frans Schreuder master
- Closed
- 1
updated Feb 22, 2021
Phase2/rm5.0

!163 · created Jul 23, 2020 by Frans Schreuder
updated Aug 19, 2020
Add Strips support for rm 4.10

!162 · created Jul 22, 2020 by Elena Zhivun master
- Merged
- 1
updated Jul 28, 2020
FromHost GBT EPROCS to axi stream

!161 · created Jul 21, 2020 by Nico Giangiacomi
- Merged
updated Sep 21, 2020
Resolve FLX-1087 "Roundrobin revisited"

!160 · created Jul 20, 2020 by Frans Schreuder master
- Closed
- 1
updated Nov 04, 2020
Revert "Revert "Change default configuration rate from 3 MHz to 6 MHz...

!159 · created Jun 26, 2020 by Frans Schreuder master
updated Jun 29, 2020
Add another routing step when timing is not completely met, followed by phys_opt_design

!158 · created Jun 24, 2020 by Frans Schreuder master
updated Jul 23, 2020
Felig flx712

!157 · created Jun 23, 2020 by Frans Schreuder master
- Merged
- 2
updated Aug 22, 2020
Updated crc.vhd to use generated code from outputlogic.com, slightly modified...

!156 · created Jun 17, 2020 by Frans Schreuder master
updated Jun 19, 2020