Commit b69fc9a9 authored by Sergi Rodriguez Bosca's avatar Sergi Rodriguez Bosca
Browse files

From std::map to std::unordered_map

parent 7481564f
......@@ -61,7 +61,7 @@ class jFEXDriver : public AthAlgorithm
ToolHandle<IjSuperCellTowerMapper> m_jSuperCellTowerMapperTool {this, "jSuperCellTowerMapperTool", "LVL1::jSuperCellTowerMapper", "Tool that maps supercells to jTowers"};
ToolHandle<IjFEXSysSim> m_jFEXSysSimTool {this, "jFEXSysSimTool", "LVL1::jFEXSysSim", "Tool that creates the jFEX System Simulation"};
std::map<Identifier, std::pair<int,int> > m_cell_to_tower_map;
std::unordered_map<Identifier, std::pair<int,int> > m_cell_to_tower_map;
};
......
......@@ -114,13 +114,13 @@ namespace LVL1 {
int m_jTowersIDs_Wide [FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_wide_algoSpace_width] = {{0}};
int m_jTowersIDs_Thin [FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_thin_algoSpace_width] = {{0}};
int m_jTowersIDs [FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_thin_algoSpace_width] = {{0}};
std::map<int,jTower> m_jTowersColl;
std::map<int,std::vector<int> > m_map_Etvalues_FPGA;
std::map<int,std::vector<int> > m_map_HAD_Etvalues_FPGA;
std::map<int,std::vector<int> > m_map_EM_Etvalues_FPGA;
std::unordered_map<int,jTower> m_jTowersColl;
std::unordered_map<int,std::vector<int> > m_map_Etvalues_FPGA;
std::unordered_map<int,std::vector<int> > m_map_HAD_Etvalues_FPGA;
std::unordered_map<int,std::vector<int> > m_map_EM_Etvalues_FPGA;
std::map<int, jFEXForwardJetsInfo> m_FCALJets;
std::unordered_map<int, jFEXForwardJetsInfo> m_FCALJets;
int m_SRJetET;
int m_LRJetET;
......
......@@ -48,17 +48,17 @@ namespace LVL1 {
virtual unsigned int localPhi(int nphi, int neta) override;
virtual unsigned int localEta(int nphi, int neta) override;
virtual unsigned int getTTowerET(int nphi, int neta) override;
virtual std::map<int, jFEXForwardJetsInfo> FcalJetsTowerIDLists() override;
virtual std::map<int, jFEXForwardJetsInfo> isSeedLocalMaxima() override;
virtual std::map<int, jFEXForwardJetsInfo> calculateJetETs() override;
virtual void setFPGAEnergy(std::map<int,std::vector<int> > et_map) override;
virtual std::unordered_map<int, jFEXForwardJetsInfo> FcalJetsTowerIDLists() override;
virtual std::unordered_map<int, jFEXForwardJetsInfo> isSeedLocalMaxima() override;
virtual std::unordered_map<int, jFEXForwardJetsInfo> calculateJetETs() override;
virtual void setFPGAEnergy(std::unordered_map<int,std::vector<int> > et_map) override;
protected:
private:
SG::ReadHandleKey<LVL1::jTowerContainer> m_jFEXForwardJetsAlgo_jTowerContainerKey {this, "MyjTowers", "jTowerContainer", "Input container for jTowers"};
int m_jFEXalgoTowerID[FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_wide_algoSpace_width];
std::map<int,std::vector<int> > m_map_Etvalues;
std::unordered_map<int,std::vector<int> > m_map_Etvalues;
int m_lowerEM_eta;
int m_upperEM_eta;
int m_jfex;
......
......@@ -44,7 +44,7 @@ namespace LVL1 {
virtual unsigned int getRingET() override;
virtual unsigned int getLargeClusterET(unsigned int smallClusterET, unsigned int largeRingET) override;
virtual std::unique_ptr<jFEXLargeRJetTOB> getLargeRJetTOBs(int smallClusterET,int TTID) override;
virtual void setFPGAEnergy(std::map<int,std::vector<int> > et_map) override;
virtual void setFPGAEnergy(std::unordered_map<int,std::vector<int> > et_map) override;
protected:
......@@ -57,7 +57,7 @@ namespace LVL1 {
//int inputTable[15][15];
int m_largeRJetEtRing_IDs[15][15];
int getTTowerET(unsigned int TTID ) ;
std::map<int,std::vector<int> > m_map_Etvalues;
std::unordered_map<int,std::vector<int> > m_map_Etvalues;
};
......
......@@ -38,19 +38,19 @@ namespace LVL1 {
int LRsize();
int tausize();
int pileupsize();
std::map<std::string, int>* get_smallRJet(int);
std::map<std::string, int>* get_largeRJet(int);
std::map<std::string, int>* get_tau(int);
std::map<std::string, int>* get_pileup(int);
std::unordered_map<std::string, int>* get_smallRJet(int);
std::unordered_map<std::string, int>* get_largeRJet(int);
std::unordered_map<std::string, int>* get_tau(int);
std::unordered_map<std::string, int>* get_pileup(int);
private:
std::map<std::string, int> m_values_tem_smallRJet;
std::vector<std::map<std::string, int>*> m_allvalues_smallRJet;
std::map<std::string, int> m_values_tem_largeRJet;
std::vector<std::map<std::string, int>*> m_allvalues_largeRJet;
std::map<std::string, int> m_values_tem_tau;
std::vector<std::map<std::string, int>*> m_allvalues_tau;
std::map<std::string, int> m_values_tem_pileup;
std::vector<std::map<std::string, int>*> m_allvalues_pileup;
std::unordered_map<std::string, int> m_values_tem_smallRJet;
std::vector<std::unordered_map<std::string, int>*> m_allvalues_smallRJet;
std::unordered_map<std::string, int> m_values_tem_largeRJet;
std::vector<std::unordered_map<std::string, int>*> m_allvalues_largeRJet;
std::unordered_map<std::string, int> m_values_tem_tau;
std::vector<std::unordered_map<std::string, int>*> m_allvalues_tau;
std::unordered_map<std::string, int> m_values_tem_pileup;
std::vector<std::unordered_map<std::string, int>*> m_allvalues_pileup;
};
}
CLASS_DEF(LVL1::jFEXOutputCollection, 1317184196 , 1 )
......
......@@ -40,9 +40,9 @@ namespace LVL1 {
virtual void setup(int FPGA[FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_thin_algoSpace_width]) override;
virtual void setup(int FPGA[FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_wide_algoSpace_width]) override;
virtual std::map<int,std::vector<int> > GetEt_values() override;
virtual std::map<int,std::vector<int> > Get_EM_Et_values() override;
virtual std::map<int,std::vector<int> > Get_HAD_Et_values() override;
virtual std::unordered_map<int,std::vector<int> > GetEt_values() override;
virtual std::unordered_map<int,std::vector<int> > Get_EM_Et_values() override;
virtual std::unordered_map<int,std::vector<int> > Get_HAD_Et_values() override;
/** Destructor **/
virtual ~jFEXPileupAndNoise();
......@@ -90,7 +90,7 @@ protected:
void reset_conters();
void SubtractPileup();
void ApplyNoiseCuts(std::map<int,std::vector<int> > & map_Etvalues, int Jet_NoiseCut, int Met_NoiseCut);
void ApplyNoiseCuts(std::unordered_map<int,std::vector<int> > & map_Etvalues, int Jet_NoiseCut, int Met_NoiseCut);
// SG information
int getTTowerEta(unsigned int TTID );
......
......@@ -73,7 +73,7 @@ namespace LVL1 {
int m_jTowersIDs_Wide [FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_wide_algoSpace_width];
int m_jTowersIDs_Thin [FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_thin_algoSpace_width];
std::map<int,jTower> m_jTowersColl;
std::unordered_map<int,jTower> m_jTowersColl;
CaloCellContainer m_sCellsCollection;
std::vector<jFEXFPGA*> m_jFEXFPGACollection;
......
......@@ -51,7 +51,7 @@ namespace LVL1 {
virtual bool checkDisplacedLM() override;
virtual std::unique_ptr<jFEXSmallRJetTOB> getSmallRJetTOBs() override;
virtual unsigned int getTTIDcentre() override;
virtual void setFPGAEnergy(std::map<int,std::vector<int> > et_map) override;
virtual void setFPGAEnergy(std::unordered_map<int,std::vector<int> > et_map) override;
// virtual jFEXSmallRJetTOB* getSmallRJetTOBs() override;
//LVL1::jFEXSmallRJetAlgoTOB * LVL1::jFEXSmallRJetAlgo::getSmallRJetTOB()
......@@ -63,7 +63,7 @@ protected:
int m_jFEXalgoSearchWindowSeedET[5][5];
bool m_seedSet;
bool m_LMDisplaced;
std::map<int,std::vector<int> > m_map_Etvalues;
std::unordered_map<int,std::vector<int> > m_map_Etvalues;
};
......
......@@ -50,7 +50,7 @@ namespace LVL1 {
virtual int GetMetXComponent() override;
virtual int GetMetYComponent() override;
virtual int getTTowerET(unsigned int TTID ) override;
virtual void setFPGAEnergy(std::map<int,std::vector<int> > et_map) override;
virtual void setFPGAEnergy(std::unordered_map<int,std::vector<int> > et_map) override;
virtual std::unique_ptr<jFEXmetTOB> getmetTOBs() override;
......@@ -71,7 +71,7 @@ protected:
virtual void buildMetXComponent();
virtual void buildMetYComponent();
std::map<int,std::vector<int> > m_map_Etvalues;
std::unordered_map<int,std::vector<int> > m_map_Etvalues;
};
......
......@@ -50,7 +50,7 @@ namespace LVL1 {
virtual void buildFWDSumET() override;
virtual int getETlowerEta(uint bin) override;
virtual int getETupperEta(uint bin) override;
virtual void setFPGAEnergy(std::map<int,std::vector<int> > et_map) override;
virtual void setFPGAEnergy(std::unordered_map<int,std::vector<int> > et_map) override;
virtual std::unique_ptr<jFEXsumETTOB> getsumETTOBs() override;
......@@ -65,7 +65,7 @@ protected:
int m_SumlowEta =0;
int m_SumhighEta=0;
std::map<int,std::vector<int> > m_map_Etvalues;
std::unordered_map<int,std::vector<int> > m_map_Etvalues;
};
......
......@@ -51,7 +51,7 @@ namespace LVL1 {
virtual int getClusterEt() override;
virtual int getIsLocalMaxima() override;
virtual int getFirstEtRing() override;
virtual void setFPGAEnergy(std::map<int,std::vector<int> > et_map) override;
virtual void setFPGAEnergy(std::unordered_map<int,std::vector<int> > et_map) override;
virtual std::unique_ptr<jFEXtauTOB> getTauTOBs(int mphi, int meta) override;
......@@ -76,7 +76,7 @@ protected:
bool m_seedSet=false;
bool m_isLocalMaxima=false;
std::map<int,std::vector<int> > m_map_Etvalues;
std::unordered_map<int,std::vector<int> > m_map_Etvalues;
struct color {
std::string RED ="\033[1;31m";
......
......@@ -305,7 +305,7 @@ StatusCode jFEXFPGA::execute() {
m_FCALJets = m_jFEXForwardJetsAlgoTool->calculateJetETs();
for(std::map<int, jFEXForwardJetsInfo>::iterator it = m_FCALJets.begin(); it!=(m_FCALJets.end()); ++it) {
for(std::unordered_map<int, jFEXForwardJetsInfo>::iterator it = m_FCALJets.begin(); it!=(m_FCALJets.end()); ++it) {
jFEXForwardJetsInfo FCALJets = it->second;
int iphi = FCALJets.getCentreLocalTTPhi();
......
......@@ -116,9 +116,9 @@ unsigned int LVL1::jFEXForwardJetsAlgo::getTTowerET(int nphi, int neta ) {
return 0;
}
std::map<int, jFEXForwardJetsInfo> LVL1::jFEXForwardJetsAlgo::FcalJetsTowerIDLists() {
std::unordered_map<int, jFEXForwardJetsInfo> LVL1::jFEXForwardJetsAlgo::FcalJetsTowerIDLists() {
std::map<int, jFEXForwardJetsInfo> FCALJetTowerIDLists;
std::unordered_map<int, jFEXForwardJetsInfo> FCALJetTowerIDLists;
std::vector<int> lower_centre_neta;
std::vector<int> upper_centre_neta;
......@@ -236,10 +236,10 @@ std::map<int, jFEXForwardJetsInfo> LVL1::jFEXForwardJetsAlgo::FcalJetsTowerIDLis
std::map<int, jFEXForwardJetsInfo> LVL1::jFEXForwardJetsAlgo::isSeedLocalMaxima() {
std::unordered_map<int, jFEXForwardJetsInfo> LVL1::jFEXForwardJetsAlgo::isSeedLocalMaxima() {
//std::vector<int> localMaximas;
std::map<int, jFEXForwardJetsInfo> localMaximaCandidates = FcalJetsTowerIDLists();
std::map<int, jFEXForwardJetsInfo> localMaximaList ;
std::unordered_map<int, jFEXForwardJetsInfo> localMaximaCandidates = FcalJetsTowerIDLists();
std::unordered_map<int, jFEXForwardJetsInfo> localMaximaList ;
SG::ReadHandle<jTowerContainer> my_jTowerContainer(m_jFEXForwardJetsAlgo_jTowerContainerKey/*,ctx*/);
size_t isLocalMaxima = 0;
......@@ -320,7 +320,7 @@ std::map<int, jFEXForwardJetsInfo> LVL1::jFEXForwardJetsAlgo::isSeedLocalMaxima(
}
std::map<int, jFEXForwardJetsInfo> LVL1::jFEXForwardJetsAlgo::calculateJetETs() {
std::unordered_map<int, jFEXForwardJetsInfo> LVL1::jFEXForwardJetsAlgo::calculateJetETs() {
// setting the lower/upper eta range for the FCAL 2 and 3 since they are not added in the seed information yet
int lowerFCAL_eta = FEXAlgoSpaceDefs::jFEX_algoSpace_C_lowerFCAL_eta;
......@@ -331,7 +331,7 @@ std::map<int, jFEXForwardJetsInfo> LVL1::jFEXForwardJetsAlgo::calculateJetETs()
upperFCAL_eta = FEXAlgoSpaceDefs::jFEX_algoSpace_A_upperFCAL_eta;
}
// Adding the FCAL 2 and 3 TT in the seed, 1st and 2nd energy rings
std::map<int, jFEXForwardJetsInfo> localMaximas = isSeedLocalMaxima();
std::unordered_map<int, jFEXForwardJetsInfo> localMaximas = isSeedLocalMaxima();
for(std::pair<int, jFEXForwardJetsInfo> element : localMaximas) {
jFEXForwardJetsInfo myFCALJetInfoClass = element.second;
......@@ -381,7 +381,7 @@ std::map<int, jFEXForwardJetsInfo> LVL1::jFEXForwardJetsAlgo::calculateJetETs()
}
void LVL1::jFEXForwardJetsAlgo::setFPGAEnergy(std::map<int,std::vector<int> > et_map){
void LVL1::jFEXForwardJetsAlgo::setFPGAEnergy(std::unordered_map<int,std::vector<int> > et_map){
m_map_Etvalues=et_map;
}
......
......@@ -102,7 +102,7 @@ int LVL1::jFEXLargeRJetAlgo::getTTowerET(unsigned int TTID ) {
}
void LVL1::jFEXLargeRJetAlgo::setFPGAEnergy(std::map<int,std::vector<int> > et_map){
void LVL1::jFEXLargeRJetAlgo::setFPGAEnergy(std::unordered_map<int,std::vector<int> > et_map){
m_map_Etvalues=et_map;
}
......
......@@ -69,28 +69,28 @@ void LVL1::jFEXOutputCollection::addValue_pileup(std::string key, int value)
void LVL1::jFEXOutputCollection::fill_smallRJet()
{
std::map<std::string, int>* values_local = new std::map<std::string, int>(m_values_tem_smallRJet);
std::unordered_map<std::string, int>* values_local = new std::unordered_map<std::string, int>(m_values_tem_smallRJet);
m_allvalues_smallRJet.push_back(values_local);
m_values_tem_smallRJet.clear();
}
void LVL1::jFEXOutputCollection::fill_largeRJet()
{
std::map<std::string, int>* values_local = new std::map<std::string, int>(m_values_tem_largeRJet);
std::unordered_map<std::string, int>* values_local = new std::unordered_map<std::string, int>(m_values_tem_largeRJet);
m_allvalues_largeRJet.push_back(values_local);
m_values_tem_largeRJet.clear();
}
void LVL1::jFEXOutputCollection::fill_tau()
{
std::map<std::string, int>* values_local = new std::map<std::string, int>(m_values_tem_tau);
std::unordered_map<std::string, int>* values_local = new std::unordered_map<std::string, int>(m_values_tem_tau);
m_allvalues_tau.push_back(values_local);
m_values_tem_tau.clear();
}
void LVL1::jFEXOutputCollection::fill_pileup()
{
std::map<std::string, int>* values_local = new std::map<std::string, int>(m_values_tem_pileup);
std::unordered_map<std::string, int>* values_local = new std::unordered_map<std::string, int>(m_values_tem_pileup);
m_allvalues_pileup.push_back(values_local);
m_values_tem_pileup.clear();
......@@ -115,19 +115,19 @@ int LVL1::jFEXOutputCollection::pileupsize()
return m_allvalues_pileup.size();
}
std::map<std::string, int>* LVL1::jFEXOutputCollection::get_smallRJet(int location)
std::unordered_map<std::string, int>* LVL1::jFEXOutputCollection::get_smallRJet(int location)
{
return m_allvalues_smallRJet[location];
}
std::map<std::string, int>* LVL1::jFEXOutputCollection::get_largeRJet(int location)
std::unordered_map<std::string, int>* LVL1::jFEXOutputCollection::get_largeRJet(int location)
{
return m_allvalues_largeRJet[location];
}
std::map<std::string, int>* LVL1::jFEXOutputCollection::get_tau(int location)
std::unordered_map<std::string, int>* LVL1::jFEXOutputCollection::get_tau(int location)
{
return m_allvalues_tau[location];
}
std::map<std::string, int>* LVL1::jFEXOutputCollection::get_pileup(int location)
std::unordered_map<std::string, int>* LVL1::jFEXOutputCollection::get_pileup(int location)
{
return m_allvalues_pileup[location];
}
......@@ -296,10 +296,10 @@ void LVL1::jFEXPileupAndNoise::ApplyPileupMet (){
std::map<int,std::vector<int> > LVL1::jFEXPileupAndNoise::Get_EM_Et_values(){
std::unordered_map<int,std::vector<int> > LVL1::jFEXPileupAndNoise::Get_EM_Et_values(){
// map for energies sent to the FPGA
std::map<int,std::vector<int> > map_Etvalues;
std::unordered_map<int,std::vector<int> > map_Etvalues;
map_Etvalues.clear();
// tmp variable to fill the map
......@@ -378,10 +378,10 @@ std::map<int,std::vector<int> > LVL1::jFEXPileupAndNoise::Get_EM_Et_values(){
return map_Etvalues;
}
std::map<int,std::vector<int> > LVL1::jFEXPileupAndNoise::Get_HAD_Et_values(){
std::unordered_map<int,std::vector<int> > LVL1::jFEXPileupAndNoise::Get_HAD_Et_values(){
// map for energies sent to the FPGA
std::map<int,std::vector<int> > map_Etvalues;
std::unordered_map<int,std::vector<int> > map_Etvalues;
map_Etvalues.clear();
// tmp variable to fill the map
......@@ -461,7 +461,7 @@ std::map<int,std::vector<int> > LVL1::jFEXPileupAndNoise::Get_HAD_Et_values(){
void LVL1::jFEXPileupAndNoise::ApplyNoiseCuts(std::map<int,std::vector<int> > & map_Etvalues, int Jet_NoiseCut, int Met_NoiseCut){
void LVL1::jFEXPileupAndNoise::ApplyNoiseCuts(std::unordered_map<int,std::vector<int> > & map_Etvalues, int Jet_NoiseCut, int Met_NoiseCut){
for(auto [key,vec] : map_Etvalues){
......@@ -478,12 +478,12 @@ void LVL1::jFEXPileupAndNoise::ApplyNoiseCuts(std::map<int,std::vector<int> > &
std::map<int,std::vector<int> > LVL1::jFEXPileupAndNoise::GetEt_values(){
std::unordered_map<int,std::vector<int> > LVL1::jFEXPileupAndNoise::GetEt_values(){
// map for energies sent to the FPGA
std::map<int,std::vector<int> > map_Etvalues;
std::map<int,std::vector<int> > map_Etvalues_EM;
std::map<int,std::vector<int> > map_Etvalues_HAD;
std::unordered_map<int,std::vector<int> > map_Etvalues;
std::unordered_map<int,std::vector<int> > map_Etvalues_EM;
std::unordered_map<int,std::vector<int> > map_Etvalues_HAD;
map_Etvalues.clear();
map_Etvalues_EM.clear();
map_Etvalues_HAD.clear();
......
......@@ -220,7 +220,7 @@ unsigned int LVL1::jFEXSmallRJetAlgo::getTTIDcentre(){
}
void LVL1::jFEXSmallRJetAlgo::setFPGAEnergy(std::map<int,std::vector<int> > et_map){
void LVL1::jFEXSmallRJetAlgo::setFPGAEnergy(std::unordered_map<int,std::vector<int> > et_map){
m_map_Etvalues=et_map;
}
......
......@@ -263,7 +263,7 @@ int LVL1::jFEXmetAlgo::getTTowerET(unsigned int TTID ) {
}
void LVL1::jFEXmetAlgo::setFPGAEnergy(std::map<int,std::vector<int> > et_map){
void LVL1::jFEXmetAlgo::setFPGAEnergy(std::unordered_map<int,std::vector<int> > et_map){
m_map_Etvalues=et_map;
}
}// end of namespace LVL1
......@@ -196,7 +196,7 @@ int LVL1::jFEXsumETAlgo::getTTowerET(unsigned int TTID ) {
}
void LVL1::jFEXsumETAlgo::setFPGAEnergy(std::map<int,std::vector<int> > et_map){
void LVL1::jFEXsumETAlgo::setFPGAEnergy(std::unordered_map<int,std::vector<int> > et_map){
m_map_Etvalues=et_map;
}
......
......@@ -230,7 +230,7 @@ int LVL1::jFEXtauAlgo::realValue(int ID, int eta){
}
void LVL1::jFEXtauAlgo::setFPGAEnergy(std::map<int,std::vector<int> > et_map){
void LVL1::jFEXtauAlgo::setFPGAEnergy(std::unordered_map<int,std::vector<int> > et_map){
m_map_Etvalues=et_map;
}
......
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