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Commit c4a71d72 authored by Cecilia Tosciri's avatar Cecilia Tosciri Committed by Vakhtang Tsulaia
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gFEXDriver FPE issue fixed and gTowerCollection::findTower fixed

parent 7c95b060
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Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/FEXAlgoSpaceDefs.h
View file @ c4a71d72
......@@ -86,6 +86,13 @@ namespace LVL1 {
constexpr static bool ENABLE_INTER_C = false;
constexpr static int gJetTOBfib = 4;
constexpr static int BTOBFIB = 6;
//define constants needed by gFEX JwoJ algorithm
constexpr static unsigned int aFPGA_A = 1;
constexpr static unsigned int bFPGA_A = 1;
constexpr static unsigned int aFPGA_B = 1;
constexpr static unsigned int bFPGA_B = 1;
constexpr static int gblockThreshold = 25000;//MeV
};
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/gFEXJwoJAlgo.h
View file @ c4a71d72
......@@ -56,21 +56,21 @@ namespace LVL1 {
virtual void gBlockAB(gTowersCentral twrs, gTowersCentral & gBlkSum);
virtual void metFPGA(gTowersCentral twrs, gTowersCentral & gBlkSum,
unsigned short & MHT_x, unsigned short & MHT_y,
unsigned short & MST_x, unsigned short & MST_y,
unsigned short & MET_x, unsigned short & MET_y);
unsigned int & MHT_x, unsigned int & MHT_y,
unsigned int & MST_x, unsigned int & MST_y,
unsigned int & MET_x, unsigned int & MET_y);
virtual void metTotal(unsigned short A_MET_x, unsigned short A_MET_y,
unsigned short B_MET_x, unsigned short B_MET_y,
unsigned short & MET_x, unsigned short & MET_y, unsigned short & MET);
virtual void metTotal(unsigned int A_MET_x, unsigned int A_MET_y,
unsigned int B_MET_x, unsigned int B_MET_y,
unsigned int & MET_x, unsigned int & MET_y, unsigned int & MET);
virtual void sumEtFPGA(gTowersCentral twrs, unsigned int & partial_sumEt);
virtual void sumEt(unsigned int A_sumEt, unsigned int B_sumEt, unsigned int & total_sumEt);
virtual unsigned short sinLUT(unsigned int phiIDX, unsigned int aw, unsigned int dw);
virtual unsigned int sinLUT(unsigned int phiIDX, unsigned int aw, unsigned int dw);
virtual unsigned short cosLUT(unsigned int phiIDX, unsigned int aw, unsigned int dw);
virtual unsigned int cosLUT(unsigned int phiIDX, unsigned int aw, unsigned int dw);
};
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/gTowerContainer.h
View file @ c4a71d72
......@@ -66,7 +66,7 @@ class gTowerContainer : public DataVector<LVL1::gTower>
IMessageSvc* msgSvc() const;
//* @brief Keeps track of the towerID of each gTower associated to each MAP index *.
std::map<int,int> m_map_towerID_containerIndex;
std::unordered_map<int,int> m_map_towerID_containerIndex;
};
}
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/gFEXCompression.cxx
View file @ c4a71d72
......@@ -11,8 +11,8 @@
namespace LVL1 {
const int gFEXCompression::s_steps[] = {12800, 50, 25, 50, 100, 25600};
const int gFEXCompression::s_minET[] = {-101200, -50000, -12800, 12800, 51200, 200000};
const int gFEXCompression::s_steps[] = {12800, 50, 25, 50, 100, 25600};//MeV
const int gFEXCompression::s_minET[] = {-101200, -50000, -12800, 12800, 51200, 200000};//MeV
const int gFEXCompression::s_minCode[] = {2, 6, 750, 1774, 2542, 4030};
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/gFEXFPGA.cxx
View file @ c4a71d72
......@@ -90,12 +90,13 @@ namespace LVL1 {
for (int myrow = 0; myrow<rows; myrow++){
for (int mycol = 0; mycol<cols; mycol++){
output_gTower_energies[myrow][mycol] = 0;
if (m_gTowersIDs_central[myrow][mycol] == 0) continue;
const LVL1::gTower * tmpTower = jk_gFEXFPGA_gTowerContainer->findTower(m_gTowersIDs_central[myrow][mycol]);
int et = tmpTower->getET();
output_gTower_energies[myrow][mycol] = et;
if (tmpTower == nullptr) continue;
output_gTower_energies[myrow][mycol] = tmpTower->getET();
}
}
}
void gFEXFPGA::GetEnergyMatrix(gTowersForward & output_gTower_energies) const{
......@@ -107,12 +108,13 @@ namespace LVL1 {
for (int myrow = 0; myrow<rows; myrow++){
for (int mycol = 0; mycol<cols; mycol++){
output_gTower_energies[myrow][mycol] = 0;
if (m_gTowersIDs_forward[myrow][mycol] == 0) continue;
const LVL1::gTower * tmpTower = jk_gFEXFPGA_gTowerContainer->findTower(m_gTowersIDs_forward[myrow][mycol]);
int et = tmpTower->getET();
output_gTower_energies[myrow][mycol] = et;
if (tmpTower == nullptr) continue;
output_gTower_energies[myrow][mycol] = tmpTower->getET();
}
}
}
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/gFEXJetAlgo.cxx
View file @ c4a71d72
......@@ -59,10 +59,6 @@ std::vector<std::unique_ptr<gFEXJetTOB>> gFEXJetAlgo::largeRfinder(
std::array<std::array<int, 3>, FEXAlgoSpaceDefs::BTOBFIB> gBlockTOBeta = {{ {{0,0,0}}, {{0,0,0}}, {{0,0,0}}, {{0,0,0}}, {{0,0,0}}, {{0,0,0}} }};
std::array<std::array<int, 3>, FEXAlgoSpaceDefs::BTOBFIB> gBlockTOBphi = {{ {{0,0,0}}, {{0,0,0}}, {{0,0,0}}, {{0,0,0}}, {{0,0,0}}, {{0,0,0}} }};
// std::array<std::array<int, 3>, 4> gBlockTOBv = {{ {{0,0,0}}, {{0,0,0}}, {{0,0,0}}, {{0,0,0}} }};
// std::array<std::array<int, 3>, 4> gBlockTOBeta = {{ {{0,0,0}}, {{0,0,0}}, {{0,0,0}}, {{0,0,0}} }};
// std::array<std::array<int, 3>, 4> gBlockTOBphi = {{ {{0,0,0}}, {{0,0,0}}, {{0,0,0}}, {{0,0,0}} }};
// calculate A & B remote partial sums first
gTowersPartialSums RAlps_out, RArps_out;
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/gFEXJwoJAlgo.cxx
View file @ c4a71d72
......@@ -47,7 +47,7 @@ void gFEXJwoJAlgo::setAlgoConstant(unsigned int aFPGA_A, unsigned int bFPGA_A,
std::vector<std::unique_ptr<gFEXJwoJTOB>> gFEXJwoJAlgo::jwojAlgo(gTowersCentral Atwr, gTowersCentral Btwr,
std::array<uint32_t, 4> & outTOB) {
std::array<uint32_t, 4> & outTOB) {
// find gBlocks
......@@ -59,29 +59,29 @@ std::vector<std::unique_ptr<gFEXJwoJTOB>> gFEXJwoJAlgo::jwojAlgo(gTowersCentral
gBlockAB(Btwr, gBLKB);
//FPGA A observables
unsigned short A_MHT_x = 0x0;
unsigned short A_MHT_y = 0x0;
unsigned short A_MST_x = 0x0;
unsigned short A_MST_y = 0x0;
unsigned short A_MET_x = 0x0;
unsigned short A_MET_y = 0x0;
unsigned int A_MHT_x = 0x0;
unsigned int A_MHT_y = 0x0;
unsigned int A_MST_x = 0x0;
unsigned int A_MST_y = 0x0;
unsigned int A_MET_x = 0x0;
unsigned int A_MET_y = 0x0;
unsigned int A_sumEt = 0x0;
//FPGA B observables
unsigned short B_MHT_x = 0x0;
unsigned short B_MHT_y = 0x0;
unsigned short B_MST_x = 0x0;
unsigned short B_MST_y = 0x0;
unsigned short B_MET_x = 0x0;
unsigned short B_MET_y = 0x0;
unsigned int B_MHT_x = 0x0;
unsigned int B_MHT_y = 0x0;
unsigned int B_MST_x = 0x0;
unsigned int B_MST_y = 0x0;
unsigned int B_MET_x = 0x0;
unsigned int B_MET_y = 0x0;
unsigned int B_sumEt = 0x0;
//Global observables
unsigned short MET_x = 0x0;
unsigned short MET_y = 0x0;
unsigned short MET = 0x0;
unsigned int MET_x = 0x0;
unsigned int MET_y = 0x0;
unsigned int MET = 0x0;
unsigned int total_sumEt = 0x0;
unsigned int MHT_x = 0x0;
......@@ -227,13 +227,12 @@ void gFEXJwoJAlgo::gBlockAB(gTowersCentral twrs, gTowersCentral & gBlkSum){
void gFEXJwoJAlgo::metFPGA(gTowersCentral twrs, gTowersCentral & gBlkSum,
unsigned short & MHT_x, unsigned short & MHT_y,
unsigned short & MST_x, unsigned short & MST_y,
unsigned short & MET_x, unsigned short & MET_y){
unsigned int & MHT_x, unsigned int & MHT_y,
unsigned int & MST_x, unsigned int & MST_y,
unsigned int & MET_x, unsigned int & MET_y){
int rows = twrs.size();
int cols = twrs[0].size();
for( int irow = 0; irow < rows; irow++ ){
for(int jcolumn = 0; jcolumn<cols; jcolumn++){
if(gBlkSum[irow][jcolumn] > m_gBlockthreshold){
......@@ -246,15 +245,15 @@ void gFEXJwoJAlgo::metFPGA(gTowersCentral twrs, gTowersCentral & gBlkSum,
}
}
}
MET_x = m_aFPGA_A * MHT_x + m_bFPGA_A * MST_x;
MET_y = m_aFPGA_B * MHT_y + m_bFPGA_B * MST_y;
}
void gFEXJwoJAlgo::metTotal(unsigned short A_MET_x, unsigned short A_MET_y,
unsigned short B_MET_x, unsigned short B_MET_y,
unsigned short & MET_x, unsigned short & MET_y, unsigned short & MET){
void gFEXJwoJAlgo::metTotal(unsigned int A_MET_x, unsigned int A_MET_y,
unsigned int B_MET_x, unsigned int B_MET_y,
unsigned int & MET_x, unsigned int & MET_y, unsigned int & MET){
MET_x = A_MET_x + B_MET_x;
MET_y = A_MET_y + B_MET_y;
......@@ -285,25 +284,25 @@ void gFEXJwoJAlgo::sumEt(unsigned int A_sumEt, unsigned int B_sumEt, unsigned
//----------------------------------------------------------------------------------
// bitwise simulation of sine LUT in firmware
//----------------------------------------------------------------------------------
unsigned short gFEXJwoJAlgo::sinLUT(unsigned int phiIDX, unsigned int aw, unsigned int dw)
unsigned int gFEXJwoJAlgo::sinLUT(unsigned int phiIDX, unsigned int aw, unsigned int dw)
{
float c = ((float)phiIDX)/pow(2,aw);
float rad = 2*M_PI*c;
float rsin = sin(rad);
return static_cast<unsigned short>(round((pow(2.0,dw-1)-1.0)*rsin));
return static_cast<unsigned int>(round((pow(2.0,dw-1)-1.0)*rsin));
}
//----------------------------------------------------------------------------------
// bitwise simulation cosine LUT in firmware
//----------------------------------------------------------------------------------
unsigned short gFEXJwoJAlgo::cosLUT(unsigned int phiIDX, unsigned int aw, unsigned int dw)
unsigned int gFEXJwoJAlgo::cosLUT(unsigned int phiIDX, unsigned int aw, unsigned int dw)
{
float c = ((float)phiIDX)/pow(2,aw);
float rad = 2*M_PI*c;
float rcos = cos(rad);
return static_cast<unsigned short>(round((pow(2.0,dw-1)-1.0)*rcos));
return static_cast<unsigned int>(round((pow(2.0,dw-1)-1.0)*rcos));
}
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/gFEXSim.cxx
View file @ c4a71d72
......@@ -105,7 +105,6 @@ StatusCode gFEXSim::executegFEXSim(gTowersIDs tmp_gTowersIDs_subset){
//Use a matrix with 32 rows, even if FPGA-C (positive) mostly deals with regions of 16 bins in phi.
//However, one small region in eta (2.5<|eta|<2.8) has 32 bins in phi. So we use a matrix 32x14
//but we fill half of it in the region 2.8<|eta|<4.8.
// int tmp_gTowersIDs_subset_forwardFPGA[32][7];
gTowersForward tmp_gTowersIDs_subset_forwardFPGA;
memset(&tmp_gTowersIDs_subset_forwardFPGA, 0, sizeof tmp_gTowersIDs_subset_forwardFPGA);
for (int myrow = 0; myrow<32; myrow++){
......@@ -129,7 +128,6 @@ StatusCode gFEXSim::executegFEXSim(gTowersIDs tmp_gTowersIDs_subset){
//Use a matrix with 32 rows, even if FPGA-C (negative) mostly deals with regions of 16 bins in phi.
//However, one small region in eta (2.5<|eta|<2.8) has 32 bins in phi. So we use a matrix 32x14
//but we fill half of it in the region 2.8<|eta|<4.8.
// int tmp_gTowersIDs_subset_forwardFPGA[32][7];
gTowersForward tmp_gTowersIDs_subset_forwardFPGA_N;
memset(&tmp_gTowersIDs_subset_forwardFPGA_N, 0, sizeof tmp_gTowersIDs_subset_forwardFPGA_N);
for (int myrow = 0; myrow<16; myrow++){
......@@ -196,11 +194,15 @@ StatusCode gFEXSim::executegFEXSim(gTowersIDs tmp_gTowersIDs_subset){
ATH_CHECK( m_gFEXJwoJAlgoTool.retrieve() );
std::array<uint32_t, 4> outTOB = {0};
m_gFEXJwoJAlgoTool->setAlgoConstant(FEXAlgoSpaceDefs::aFPGA_A, FEXAlgoSpaceDefs::bFPGA_A,
FEXAlgoSpaceDefs::aFPGA_B, FEXAlgoSpaceDefs::bFPGA_B,
FEXAlgoSpaceDefs::gblockThreshold);
auto global_tobs = m_gFEXJwoJAlgoTool->jwojAlgo(Atwr, Btwr, outTOB);
m_gGlobalTobWords.resize(4);
//Placing the global TOBs into a dedicated array
//Placing the global TOBs into a dedicated array
m_gGlobalTobWords[0] = outTOB[0];//
m_gGlobalTobWords[1] = outTOB[1];//
m_gGlobalTobWords[2] = outTOB[2];//
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/gFEXSysSim.cxx
View file @ c4a71d72
......@@ -106,10 +106,8 @@ namespace LVL1 {
// Since gFEX consists of a single module, here we are just (re)assigning the gTowerID
std::map<int,gTower> tmp_gTowersColl_subset;
// Defining a matrix 32x38 corresponding to the gFEX structure (32 phi x 38 eta in the most general case - forward region has 16 phi bins)
// int tmp_gTowersIDs_subset [32][38];
typedef std::array<std::array<int, 38>, 32> gTowersIDs;
gTowersIDs tmp_gTowersIDs_subset;
......@@ -121,8 +119,6 @@ namespace LVL1 {
for(int thisRow=0; thisRow<rows/2; thisRow++){
int towerid = initialFCAL - ((thisCol) * 16) + thisRow;
tmp_gTowersIDs_subset[thisRow][thisCol] = towerid;
tmp_gTowersColl_subset.insert( std::map<int, gTower>::value_type(towerid, *(this_gTowerContainer->findTower(towerid))));
}
}
......@@ -131,8 +127,6 @@ namespace LVL1 {
for(int thisRow=0; thisRow<rows/2; thisRow++){
int towerid = initialTRANSFCAL - ((thisCol-4) * 16) + thisRow;
tmp_gTowersIDs_subset[thisRow][thisCol] = towerid;
tmp_gTowersColl_subset.insert( std::map<int, gTower>::value_type(towerid, *(this_gTowerContainer->findTower(towerid))));
}
}
......@@ -141,8 +135,6 @@ namespace LVL1 {
for(int thisRow=0; thisRow<rows; thisRow++){
int towerid = initialEMEC - ((thisCol-6) * 32) + thisRow;
tmp_gTowersIDs_subset[thisRow][thisCol] = towerid;
tmp_gTowersColl_subset.insert( std::map<int, gTower>::value_type(towerid, *(this_gTowerContainer->findTower(towerid))));
}
}
......@@ -151,8 +143,6 @@ namespace LVL1 {
int thisCol = 11;
int towerid = initialTRANSEMB + thisRow;
tmp_gTowersIDs_subset[thisRow][thisCol] = towerid;
tmp_gTowersColl_subset.insert( std::map<int, gTower>::value_type(towerid, *(this_gTowerContainer->findTower(towerid))));
}
// set the EMB negative part
......@@ -160,8 +150,6 @@ namespace LVL1 {
for(int thisRow=0; thisRow<rows; thisRow++){
int towerid = initialEMB - ( (thisCol-12) * 32) + thisRow;
tmp_gTowersIDs_subset[thisRow][thisCol] = towerid;
tmp_gTowersColl_subset.insert( std::map<int, gTower>::value_type(towerid, *(this_gTowerContainer->findTower(towerid))));
}
}
......@@ -170,8 +158,6 @@ namespace LVL1 {
for(int thisRow=0; thisRow<rows; thisRow++){
int towerid = initialposEMB + ( (thisCol-19) * 32) + thisRow;
tmp_gTowersIDs_subset[thisRow][thisCol] = towerid;
tmp_gTowersColl_subset.insert( std::map<int, gTower>::value_type(towerid, *(this_gTowerContainer->findTower(towerid))));
}
}
......@@ -180,16 +166,12 @@ namespace LVL1 {
int thisCol = 26;
int towerid = initialposTRANSEMB + thisRow;
tmp_gTowersIDs_subset[thisRow][thisCol] = towerid;
tmp_gTowersColl_subset.insert( std::map<int, gTower>::value_type(towerid, *(this_gTowerContainer->findTower(towerid))));
}
// set the EMEC positive part
for(int thisCol=27; thisCol<32; thisCol++){
for(int thisRow=0; thisRow<rows; thisRow++){
int towerid = initialposEMEC + ((thisCol-27) * 32) + thisRow;
tmp_gTowersIDs_subset[thisRow][thisCol] = towerid;
tmp_gTowersColl_subset.insert( std::map<int, gTower>::value_type(towerid, *(this_gTowerContainer->findTower(towerid))));
}
}
......@@ -198,8 +180,6 @@ namespace LVL1 {
for(int thisRow=0; thisRow<rows/2; thisRow++){
int towerid = initialposTRANSFCAL + ((thisCol-32) * 16) + thisRow;
tmp_gTowersIDs_subset[thisRow][thisCol] = towerid;
tmp_gTowersColl_subset.insert( std::map<int, gTower>::value_type(towerid, *(this_gTowerContainer->findTower(towerid))));
}
}
......@@ -208,8 +188,6 @@ namespace LVL1 {
for(int thisRow=0; thisRow<rows/2; thisRow++){
int towerid = initialposFCAL + ((thisCol-34) * 16) + thisRow;
tmp_gTowersIDs_subset[thisRow][thisCol] = towerid;
tmp_gTowersColl_subset.insert( std::map<int, gTower>::value_type(towerid, *(this_gTowerContainer->findTower(towerid))));
}
}
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/gTowerContainer.cxx
View file @ c4a71d72
......@@ -35,22 +35,45 @@ void gTowerContainer::print() const {
const LVL1::gTower * gTowerContainer::findTower(int towerID) const
{
int container_index = -1;
container_index = m_map_towerID_containerIndex.find(towerID)->second;
if(container_index >= 0){
return (*this)[container_index];
const auto it = m_map_towerID_containerIndex.find(towerID);
if (it == m_map_towerID_containerIndex.end()) {
REPORT_MESSAGE_WITH_CONTEXT (MSG::WARNING, "gTowerContainer") << "Requested tower ID "
<< towerID
<< " not found in container.";
return nullptr;
}
return nullptr;
const int container_index = it->second;
if (container_index < 0) {
return nullptr;
}
return (*this)[container_index];
}
LVL1::gTower * gTowerContainer::findTower(int towerID)
{
int container_index = -1;
container_index = m_map_towerID_containerIndex.find(towerID)->second;
if(container_index >= 0){
return (*this)[container_index];
}
return nullptr;
const auto it = m_map_towerID_containerIndex.find(towerID);
if (it == m_map_towerID_containerIndex.end()) {
REPORT_MESSAGE_WITH_CONTEXT (MSG::WARNING, "gTowerContainer") << "Requested tower ID "
<< towerID
<< " not found in container.";
return nullptr;
}
const int container_index = it->second;
if (container_index < 0) {
return nullptr;
}
return (*this)[container_index];
}
void gTowerContainer::clearContainerMap()
......
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