From 62eaec2128e8f881d85a0d5433dad5a509cc869a Mon Sep 17 00:00:00 2001
From: John Derek Chapman <chapman@hep.phy.cam.ac.uk>
Date: Wed, 29 Apr 2020 10:19:50 +0000
Subject: [PATCH] Merge branch 'pileup-fix' into '21.3'

bug fix for gFEX pileup correction

See merge request atlas/athena!32463

(cherry picked from commit 0def14ccf70070023bb4353eacceb6d7638c5d62)

1a077de1 bug fix
---
 .../TrigT1/TrigT1CaloFexSim/src/JGTowerMaker.cxx  |  1 +
 .../TrigT1/TrigT1CaloFexSim/src/JGTowerReader.cxx | 15 ++++++++++++---
 2 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/Trigger/TrigT1/TrigT1CaloFexSim/src/JGTowerMaker.cxx b/Trigger/TrigT1/TrigT1CaloFexSim/src/JGTowerMaker.cxx
index 5bfdd6d1a20c..c041a41340c0 100644
--- a/Trigger/TrigT1/TrigT1CaloFexSim/src/JGTowerMaker.cxx
+++ b/Trigger/TrigT1/TrigT1CaloFexSim/src/JGTowerMaker.cxx
@@ -101,6 +101,7 @@ StatusCode JGTowerMaker::FexAlg(const std::vector<std::shared_ptr<JGTower>>& jgT
            CaloCell* scell = (CaloCell*) scells->findCell(sc_hash);
            if(scell==nullptr)continue; 
 	   float scell_et = scell->et();
+	   if(isnan(scell_et))ATH_MSG_ERROR("Supercell ET is nan. Likely due to BCID correction or something else upstream");
 	   float time = scell->time(); 
 	   if(m_EmulateSC){
 	     if(scell_et<10e3 && fabs(time)>8) continue;
diff --git a/Trigger/TrigT1/TrigT1CaloFexSim/src/JGTowerReader.cxx b/Trigger/TrigT1/TrigT1CaloFexSim/src/JGTowerReader.cxx
index 0e751066f550..d92916020b51 100644
--- a/Trigger/TrigT1/TrigT1CaloFexSim/src/JGTowerReader.cxx
+++ b/Trigger/TrigT1/TrigT1CaloFexSim/src/JGTowerReader.cxx
@@ -580,9 +580,18 @@ StatusCode JGTowerReader::GFexAlg(const xAOD::JGTowerContainer* gTs){
     float eta = tower->eta();
 
     std::string FPGA = GFEX_pFPGA(eta); 
-    if(FPGA=="A")h_fpga_a->Fill(tower->et());
-    if(FPGA=="B")h_fpga_b->Fill(tower->et());
-    if(FPGA=="C")h_fpga_c->Fill(tower->et());
+    if(FPGA=="A"){
+      h_fpga_a->Fill(tower->et());
+      temp_a.push_back(tower);
+    }
+    if(FPGA=="B"){
+      h_fpga_b->Fill(tower->et());
+      temp_b.push_back(tower);
+    }
+    if(FPGA=="C"){
+      h_fpga_c->Fill(tower->et());
+      temp_c.push_back(tower);
+    }
 
   }
   const xAOD::JGTowerContainer* fpga_a = temp_a.asDataVector();
-- 
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