From 3431ece38aeba70b10a3fb95c83a188112a6eae5 Mon Sep 17 00:00:00 2001 From: Walter Lampl Date: Tue, 3 May 2022 11:55:23 +0200 Subject: [PATCH] skeleton.HITtoRDO.py: Don't schedule RecoTimingAlg in MT mode --- .../share/skeleton.HITtoRDO.py | 24 +++++++++++-------- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git a/Simulation/SimuJobTransforms/share/skeleton.HITtoRDO.py b/Simulation/SimuJobTransforms/share/skeleton.HITtoRDO.py index 747d99d92bc..b28f3f6ff9d 100644 --- a/Simulation/SimuJobTransforms/share/skeleton.HITtoRDO.py +++ b/Simulation/SimuJobTransforms/share/skeleton.HITtoRDO.py @@ -398,16 +398,20 @@ topSeq = AlgSequence() ## Set Overall per-Algorithm time-limit on the AlgSequence topSeq.TimeOut = 43200 * Units.s -try: - timingOutput = "HITStoRDO_timings" - if digitizationFlags.PileUpPresampling and 'LegacyOverlay' not in digitizationFlags.experimentalDigi(): - from OverlayCommonAlgs.OverlayFlags import overlayFlags - timingOutput = overlayFlags.bkgPrefix() + timingOutput - - from RecAlgs.RecAlgsConf import TimingAlg - topSeq += TimingAlg("DigiTimerBegin", TimingObjOutputName = timingOutput) -except: - digilog.warning('Could not add TimingAlg, no timing info will be written out.') + +if jobproperties.ConcurrencyFlags.NumThreads() == 0: + try: + timingOutput = "HITStoRDO_timings" + if digitizationFlags.PileUpPresampling and 'LegacyOverlay' not in digitizationFlags.experimentalDigi(): + from OverlayCommonAlgs.OverlayFlags import overlayFlags + timingOutput = overlayFlags.bkgPrefix() + timingOutput + + from RecAlgs.RecAlgsConf import TimingAlg + topSeq += TimingAlg("DigiTimerBegin", TimingObjOutputName = timingOutput) + except: + digilog.warning('Could not add TimingAlg, no timing info will be written out.') +else: + digilog.info("MT mode, not scheduling TimingAlg") include ("Digitization/Digitization.py") -- GitLab