From 75e38f2eb28c15701df38e173854b381c8aa2525 Mon Sep 17 00:00:00 2001 From: Martin Cejp Date: Mon, 6 Jun 2022 17:09:42 +0200 Subject: [PATCH] Fix minor formatting issue in User Guide --- doc/cheby-ug.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/doc/cheby-ug.txt b/doc/cheby-ug.txt index 9d8b811..6ad9e10 100644 --- a/doc/cheby-ug.txt +++ b/doc/cheby-ug.txt @@ -257,10 +257,10 @@ Finally it is possible to use "none" not to use any pipelining. The pipelining is a single barrier of registers inserted on an internal bus, which is created from the external bus. -`name-suffix`: The name of the hdl entity or module is by default the name of +`name-suffix`:: The name of the hdl entity or module is by default the name of the memory map. This attribute adds a suffix to those names. -`bus-granularity`: Specify the granularity of the addresses. If set to +`bus-granularity`:: Specify the granularity of the addresses. If set to `word`, the address bus LSB bits are omitted. So if a word is 4 bytes, the address bus start at bit 2. If set to `byte`, the address bus start at 0 (but those extra bits are ignored). The default is -- GitLab