##### Cheby favours a description of the memory map in a dedicated text file. Another possibility is to annotate HDL files and extract from those files the information required for automatic generation of register/FIFO/RAM, software access, documentation, etc. What are the merits and disadvantages of each solution?
Place holder for response.
##### Cheby seems to favour designing using traditional HDLs. Have you looked at alternatives such as [Migen and MiSoc](https://m-labs.hk/migen/), and if so, what are in your opinion the relative merits of each approach?
