You first need to convert your map(s) using `gena2cheby` which accepts an XML file and generate a YAML file on the standard output. Then using a dedicated code generator of `cheby`, you can generate the VHDL. This VHDL is almost identical the the VHDL file generated by Gena; some whitespaces change.
## Documents
Cheby for HDL designers presentation (2019-03-25) [Cheby-for-hdl.pdf](uploads/0f476fca734b8cbc7a9531e76609c7d4/Cheby-for-hdl.pdf)
