gw: consider using existing I2C bus instead of SHARED_BUS for C2C reset

c2c_rst from the base design uses 2 SHARED_BUS signals, wouldn't it be better to use the existing I2C bus (FPGA_SDA/SCL for v1, BP_SDA/SCL for v2 - see also MR !34 (merged)) for that purpose so the user is free to use all SHARED_BUS signals at will?