Understand why intel_iommu=off is necessary

If the intel_iommu=on command line option (or kernel configuration) is given, then DMA transfers do not work with errors like this

[ 1297.729464] DMAR: DRHD: handling fault status reg 3
[ 1297.729471] DMAR: [DMA Write NO_PASID] Request device [10:00.0] fault addr 0x3ab40000 [fault reason 0x05] PTE Write access is not set

However, disabling the intel IOMMU makes everything work as expected. Why?

And once understood, can we make it also work with intel_iommu=on?

Edited Sep 09, 2024 by Dimitris Lampridis