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Version 1.0.0 - (23/11/2023)
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Common
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- Xilinx Toolchain migrated from v2019.2 to v2022.2

Gateware
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- FPGA ID Ip core to read git version, build date, commit hash..
- CDMA Engine
- Chip 2 Chip + Aurora 64/66b for communication with peripheral boards
- Chip 2 Chip hotplug mechanism
- Change Aurora 64/66b speed to 8 Gbps
- Change Aurora for bank 225 changed to MGT_CLKREF.CLK_P3 (125 MHz)
- Change Aurora for bank 227 changed to MGT_CLKREF.CLK_P2 (125 MHz)
- Added extra PL Reset for hard reset of CDMA, C2C and Aurora 64/66b
- Added clock to enable PTP synchronization
- Creating IP Repository

Embedded software
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- Reduced amount of FSBL patches from 5 to 1

Arm trusted firmware
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- No changes

Device-tree
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- Added SMBIOS information
- Added node that deletes 3rd and 4th CPU
- Added subnode mdio in the gem description
- Added SPI DAC to control VCXO in device-tree
- Change QSPI maximun frequency to 50MHz
- Deleted backup local-mac-address

U-Boot
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- Added efi boot option for grub
- Added option to override U-Boot environment with uEnv.txt file in BOOTFS partition of SD Card
- Removed patches and implemented their functionality with native U-Boot variables and commands
- Removed PetaLinux platform-top/auto.h, added diot.h
- Removed functionality to mount root filesystem in QSPI flash