From e4e03bdfa635a15d4cc6b2e187f4f40034575b81 Mon Sep 17 00:00:00 2001 From: mriggire <marco.riggirello@cern.ch> Date: Fri, 17 May 2024 17:14:13 +0200 Subject: [PATCH] address table replacement to include FIFOs control registers. --- .../common/addr_table/dtc_data_aggregator.xml | 121 ++++++++++++++++++ 1 file changed, 121 insertions(+) create mode 100644 replacements/dtc/dtc-be/common/addr_table/dtc_data_aggregator.xml diff --git a/replacements/dtc/dtc-be/common/addr_table/dtc_data_aggregator.xml b/replacements/dtc/dtc-be/common/addr_table/dtc_data_aggregator.xml new file mode 100644 index 00000000..04ef7b4d --- /dev/null +++ b/replacements/dtc/dtc-be/common/addr_table/dtc_data_aggregator.xml @@ -0,0 +1,121 @@ +<node> + <node id="daqpath_ext_ctrl" address="0x0" fwinfo="endpoint;width=4"> + <node id="C0" address="0x0" /> + <node id="C1" address="0x1" /> + <node id="C2" address="0x2" /> + <node id="C3" address="0x3" /> + <node id="S0" address="0x4" /> + <node id="S1" address="0x5" /> + <node id="S2" address="0x6" /> + <node id="S3" address="0x7" /> + </node> + + <node id="daqpath_csr" address="0x10" fwinfo="endpoint;width=4"> + <node id="C0" address="0x0"/> + <node id="C1" address="0x1"/> + <node id="C2" address="0x2"/> + <node id="C3" address="0x3"/> + <node id="S0" address="0x4"/> + <node id="S1" address="0x5"/> + <node id="S2" address="0x6"/> + <node id="S3" address="0x7"/> + </node> + + <node id="CH_CSR" address="0x100000" fwinfo="endpoint;width=20"> + <node id="CH0" address="0x0000"> + <node id="C0" address="0x0" /> + <node id="C1" address="0x1" /> + <node id="C2" address="0x2" /> + <node id="C3" address="0x3" /> + <node id="S0" address="0x4" /> + <node id="S1" address="0x5" /> + <node id="S2" address="0x6" /> + <node id="S3" address="0x7" /> + </node> + + <node id="CH1" address="0x0100"> + <node id="C0" address="0x0" /> + <node id="C1" address="0x1" /> + <node id="C2" address="0x2" /> + <node id="C3" address="0x3" /> + <node id="S0" address="0x4" /> + <node id="S1" address="0x5" /> + <node id="S2" address="0x6" /> + <node id="S3" address="0x7" /> + </node> + + <node id="CH2" address="0x0200"> + <node id="C0" address="0x0" /> + <node id="C1" address="0x1" /> + <node id="C2" address="0x2" /> + <node id="C3" address="0x3" /> + <node id="S0" address="0x4" /> + <node id="S1" address="0x5" /> + <node id="S2" address="0x6" /> + <node id="S3" address="0x7" /> + </node> + + <node id="CH3" address="0x0300"> + <node id="C0" address="0x0" /> + <node id="C1" address="0x1" /> + <node id="C2" address="0x2" /> + <node id="C3" address="0x3" /> + <node id="S0" address="0x4" /> + <node id="S1" address="0x5" /> + <node id="S2" address="0x6" /> + <node id="S3" address="0x7" /> + </node> + + </node> + + <node id="IN" address="0x200000" fwinfo="endpoint;width=20"> + <node id="CH0" address="0x0000"> + <node id="DWL_FIFO" address="0x0" mode="non-incremental" size="1024" permission="w" /> + <node id="DWH_FIFO" address="0x1" mode="non-incremental" size="1024" permission="w" /> + <node id="NW_FIFO" address="0x2" mode="non-incremental" size="512" permission="w" /> + <node id="ID_FIFO" address="0x3" mode="non-incremental" size="512" permission="w" /> + <node id="TS_FIFO" address="0x4" mode="non-incremental" size="512" permission="w" /> + </node> + + <node id="CH1" address="0x0100"> + <node id="DWL_FIFO" address="0x0" mode="non-incremental" size="1024" permission="w" /> + <node id="DWH_FIFO" address="0x1" mode="non-incremental" size="1024" permission="w" /> + <node id="NW_FIFO" address="0x2" mode="non-incremental" size="512" permission="w" /> + <node id="ID_FIFO" address="0x3" mode="non-incremental" size="512" permission="w" /> + <node id="TS_FIFO" address="0x4" mode="non-incremental" size="512" permission="w" /> + </node> + + <node id="CH2" address="0x0200"> + <node id="DWL_FIFO" address="0x0" mode="non-incremental" size="1024" permission="w" /> + <node id="DWH_FIFO" address="0x1" mode="non-incremental" size="1024" permission="w" /> + <node id="NW_FIFO" address="0x2" mode="non-incremental" size="512" permission="w" /> + <node id="ID_FIFO" address="0x3" mode="non-incremental" size="512" permission="w" /> + <node id="TS_FIFO" address="0x4" mode="non-incremental" size="512" permission="w" /> + </node> + + <node id="CH3" address="0x0300"> + <node id="DWL_FIFO" address="0x0" mode="non-incremental" size="1024" permission="w" /> + <node id="DWH_FIFO" address="0x1" mode="non-incremental" size="1024" permission="w" /> + <node id="NW_FIFO" address="0x2" mode="non-incremental" size="512" permission="w" /> + <node id="ID_FIFO" address="0x3" mode="non-incremental" size="512" permission="w" /> + <node id="TS_FIFO" address="0x4" mode="non-incremental" size="512" permission="w" /> + </node> + + </node> + + <node id="OUT" address="0x300000" fwinfo="endpoint;width=20"> + <node id="LINK0" address="0x00000"> + <node id="DWL_FIFO" address="0x0" mode="non-incremental" size="1024" permission="r" /> + <node id="DWH_FIFO" address="0x1" mode="non-incremental" size="1024" permission="r" /> + <node id="IDNW_FIFO" address="0x2" mode="non-incremental" size="512" permission="r" /> + </node> + + <!--<node id="LINK1" address="0x10000"> + <node id="DWL_FIFO" address="0x0" mode="non-incremental" size="1024" permission="r" /> + <node id="DWH_FIFO" address="0x1" mode="non-incremental" size="1024" permission="r" /> + <node id="IDNW_FIFO" address="0x2" mode="non-incremental" size="512" permission="r" /> + </node>--> + + </node> + +</node> -- GitLab