Test commit

HWInterface/CicInterface.cc

@@ -831,7 +831,6 @@ namespace Ph2_HwInterface {
     // with the BE or the other readout ASICs on the chip 
     bool CicInterface::StartUp( Chip* pChip, uint8_t pDriveStrength) 
     {
-        bool cSuccess = this->SoftReset(pChip);
         std::string cOut = ".... Starting CIC start-up ........ on hybrid " + std::to_string( pChip->getFeId() ); 
         if( pChip->getFrontEndType() == FrontEndType::CIC )
             cOut += " for CIC1.";
@@ -839,6 +838,14 @@ namespace Ph2_HwInterface {
             cOut += " for CIC2.";
         LOG (INFO) << BOLDBLUE <<  cOut << RESET;
         
+        bool cSuccess = this->CheckSoftReset(pChip);
+        // if( !cSuccess ) 
+        // {
+        //     LOG (INFO) << BOLDBLUE << "Could " << BOLDRED << " NOT " << BOLDBLUE << " clear SOFT reset request in CIC... " << RESET;
+        //     exit(0);
+        // }
+        // bool cSuccess = this->SoftReset(pChip);
+        
         bool cClkTermination = true; 
         bool cRxTermination =  false;
         //(pChip->getFrontEndType() == FrontEndType::CIC ) ? true : false ;// true, false -- this needs to be false for the crate set-up .. how to fix this?!?!
@@ -885,12 +892,12 @@ namespace Ph2_HwInterface {
         this->EnableFEs(pChip, {0,1,2,3,4,5,6,7} , true);
         
         // check if we need a soft RESET
-        cSuccess = this->CheckSoftReset(pChip);
-        if( !cSuccess ) 
-        {
-            LOG (INFO) << BOLDBLUE << "Could " << BOLDRED << " NOT " << BOLDBLUE << " clear SOFT reset request in CIC... " << RESET;
-            exit(0);
-        }
+        // cSuccess = this->CheckSoftReset(pChip);
+        // if( !cSuccess ) 
+        // {
+        //     LOG (INFO) << BOLDBLUE << "Could " << BOLDRED << " NOT " << BOLDBLUE << " clear SOFT reset request in CIC... " << RESET;
+        //     exit(0);
+        // }
         
         // select fast command edge 
         bool cNegEdge=true;

settings/CicFiles/CIC2_default.txt

@@ -53,9 +53,9 @@ EXT_WA_DELAY19                                  0x03    0x65    0x44    0x44
 * PhyPort registers
 *--------------------------------------------------------------------------------
 PHY_PORT_CONFIG                                 0x00    0x0D    0x01    0x03
-scDllCurrentSet0                                0x00    0x01    0x00    0x55
-scDllCurrentSet1                                0x00    0x02    0x00    0x55
-scDllCurrentSet2                                0x00    0x03    0x00    0x55
+scDllCurrentSet0                                0x00    0x01    0x00    0xFF
+scDllCurrentSet1                                0x00    0x02    0x00    0xFF
+scDllCurrentSet2                                0x00    0x03    0x00    0xFF
 scDllConfirmCountSelect0                        0x00    0x04    0x55    0xFF
 scDllConfirmCountSelect1                        0x00    0x05    0x55    0xFF
 scDllConfirmCountSelect2                        0x00    0x06    0x55    0xFF