Commit e35ac481 authored by Younes Otarid's avatar Younes Otarid
Browse files

introduced lpGBT R/W with CPB functions for cleaner code

parent 62026629
......@@ -45,4 +45,5 @@ std::string BeBoardFWInterface::readBoardType()
void BeBoardFWInterface::PowerOn() {}
void BeBoardFWInterface::PowerOff() {}
void BeBoardFWInterface::ReadVer() {}
} // namespace Ph2_HwInterface
......@@ -270,13 +270,19 @@ class BeBoardFWInterface : public RegManager
// ############################
virtual void StatusOptoLink(Ph2_HwDescription::Chip* pChip, uint32_t& isReady, uint32_t& isFIFOempty) = 0;
virtual void ResetOptoLink(Ph2_HwDescription::Chip* pChip) = 0;
virtual bool WriteOptoLinkRegister(Ph2_HwDescription::Chip* pChip, uint32_t pAddress, uint32_t pData, bool pVerifLoop = false) = 0;
virtual bool WriteOptoLinkRegister(Ph2_HwDescription::Chip* pChip, uint32_t pAddress, uint32_t pValue, bool pVerifLoop = false) = 0;
virtual uint32_t ReadOptoLinkRegister(Ph2_HwDescription::Chip* pChip, uint32_t pAddress) = 0;
// ##########################################
// # Read/Write new Command Processor Block #
// ##########################################
//functions for new Command Processor Block
virtual void ResetCPB(Ph2_HwDescription::Chip* pChip) = 0;
virtual void WriteCommandCPB(Ph2_HwDescription::Chip* pChip, const std::vector<uint32_t>& pData) = 0;
virtual std::vector<uint32_t> ReadReplyCPB(Ph2_HwDescription::Chip* pChip, uint8_t pNWords, bool pDryRead = false) = 0;
virtual void ResetCPB() = 0;
virtual void WriteCommandCPB(const std::vector<uint32_t>& pCommandVector) = 0;
virtual std::vector<uint32_t> ReadReplyCPB(uint8_t pNWords) = 0;
//function to read/write lpGBT registers
virtual bool WriteLpGBTRegister(uint16_t pRegisterAddress, uint8_t pRegisterValue, bool pVerifLoop = true) = 0;
virtual uint8_t ReadLpGBTRegister(uint16_t pRegisterAddress) = 0;
protected:
uint32_t fBlockSize{0};
......
This diff is collapsed.
......@@ -737,13 +737,19 @@ class D19cFWInterface : public BeBoardFWInterface
//Functions for standard uDTC
void StatusOptoLink(Ph2_HwDescription::Chip* pChip, uint32_t& isReady, uint32_t& isFIFOempty) override {}
void ResetOptoLink(Ph2_HwDescription::Chip* pChip) override;
bool WriteOptoLinkRegister(Ph2_HwDescription::Chip* pChip, uint32_t pAddress, uint32_t pData, bool pVerifLoop = false) override;
bool WriteOptoLinkRegister(Ph2_HwDescription::Chip* pChip, uint32_t pAddress, uint32_t pValue, bool pVerifLoop = false) override;
uint32_t ReadOptoLinkRegister(Ph2_HwDescription::Chip* pChip, uint32_t pAddress) override;
// ##########################################
// # Read/Write new Command Processor Block #
// ##########################################
//functions for new Command Processor Block
void ResetCPB(Ph2_HwDescription::Chip* pChip) override;
void WriteCommandCPB(Ph2_HwDescription::Chip* pChip, const std::vector<uint32_t>& pData) override;
std::vector<uint32_t> ReadReplyCPB(Ph2_HwDescription::Chip* pChip, uint8_t pNWords, bool pDryRead = false) override;
void ResetCPB() override;
void WriteCommandCPB(const std::vector<uint32_t>& pCommandVector) override;
std::vector<uint32_t> ReadReplyCPB(uint8_t pNWords) override;
//function to read/write lpGBT registers
bool WriteLpGBTRegister(uint16_t pRegisterAddress, uint8_t pRegisterValue, bool pVerifLoop = true) override;
uint8_t ReadLpGBTRegister(uint16_t pRegisterValue) override;
};
} // namespace Ph2_HwInterface
......
......@@ -36,7 +36,22 @@ bool D19clpGBTInterface::ConfigureChip(Ph2_HwDescription::Chip* pChip, bool pVer
}
}
*/
// To be uncommented if crate is used
// clpGBTInterface->SetConfigMode(cOpticalGroup->flpGBT, "i2c", false);
SetConfigMode(pChip, "serial", false);
PrintChipMode(pChip);
ConfigurePSROH(pChip, 5);
uint8_t cPUSMStatus = GetPUSMStatus(pChip);
uint16_t cIter = 0, cMaxIter = 2000;
while(cPUSMStatus != 18 && cIter < cMaxIter)
{
LOG(INFO) << BOLDRED << "lpGBT not configured [NOT READY] -- PUSM status = " << +cPUSMStatus << RESET;
cPUSMStatus = GetPUSMStatus(pChip);
cIter++;
}
if(cPUSMStatus != 18) exit(0);
LOG(INFO) << BOLDGREEN << "lpGBT Configured [READY]" << RESET;
// clpGBTInterface->SetConfigMode(cOpticalGroup->flpGBT, "serial", true);
return true;
}
......@@ -76,23 +91,9 @@ bool D19clpGBTInterface::WriteReg(Ph2_HwDescription::Chip* pChip, uint16_t pAddr
if(fUseOpticalLink)
{
if(fUseCPB)
{
//Use new Command Processor Block
uint8_t cWorkerId = 16, cFunctionId = 3;
std::vector<uint32_t> cCommandVector;
cCommandVector.clear();
cCommandVector.push_back(cWorkerId << 24 | cFunctionId << 16 | pAddress << 0);
cCommandVector.push_back(pValue << 0);
fBoardFW->WriteCommandCPB(pChip, cCommandVector);
std::vector<uint32_t> cReplyVector = fBoardFW->ReadReplyCPB(pChip, 10);
cReadBack = cReplyVector[7] & 0xFF;
}
return fBoardFW->WriteLpGBTRegister(pAddress, pValue, pVerifLoop);
else
{
//Use standard uDTC IC block
fBoardFW->WriteOptoLinkRegister(pChip, pAddress, pValue, pVerifLoop);
cReadBack = ReadReg(pChip, pAddress);
}
return fBoardFW->WriteOptoLinkRegister(pChip, pAddress, pValue, pVerifLoop);
}
else
{
......@@ -101,47 +102,24 @@ bool D19clpGBTInterface::WriteReg(Ph2_HwDescription::Chip* pChip, uint16_t pAddr
fTC_PSROH.write_i2c(pAddress, static_cast<char>(pValue));
#endif
}
if(!pVerifLoop) return true;
return true;
//FIXME USB interface needs verification loop here or library ?
if(!pVerifLoop)
// Verify success of Write
uint8_t cIter = 0, cMaxIter = 50;
while(cReadBack != pValue && cIter < cMaxIter)
if(!fUseOpticalLink)
{
// Now pick one configuration mode
if(fUseOpticalLink)
{
if(fUseCPB)
{
fBoardFW->ResetCPB(pChip);
//Use new Command Processor Block
uint8_t cWorkerId = 16, cFunctionId = 3;
std::vector<uint32_t> cCommandVector;
cCommandVector.clear();
cCommandVector.push_back(cWorkerId << 24 | cFunctionId << 16 | pAddress << 0);
cCommandVector.push_back(pValue << 0);
fBoardFW->WriteCommandCPB(pChip, cCommandVector);
std::vector<uint32_t> cReplyVector = fBoardFW->ReadReplyCPB(pChip, 10);
cReadBack = cReplyVector[7] & 0xFF;
}
else
{
//Use standard uDTC IC block
fBoardFW->WriteOptoLinkRegister(pChip, pAddress, pValue, pVerifLoop);
cReadBack = ReadReg(pChip, pAddress);
}
}
else
uint8_t cIter = 0, cMaxIter = 50;
while(cReadBack != pValue && cIter < cMaxIter)
{
// Now pick one configuration mode
// use PS-ROH test card USB interface
#ifdef __TCUSB__
fTC_PSROH.write_i2c(pAddress, static_cast<char>(pValue));
cReadBack = fTC_PSROH.write_i2c(pAddress, static_cast<char>(pValue));
#endif
cIter++;
}
cIter++;
}
if(cIter == cMaxIter)
{
LOG(INFO) << BOLDRED << "REGISTER WRITE MISMATCH" << RESET;
throw std::runtime_error(std::string("lpGBT register write mismatch"));
if(cIter == cMaxIter)
throw std::runtime_error(std::string("lpGBT register write mismatch"));
}
return true;
}
......@@ -149,30 +127,20 @@ bool D19clpGBTInterface::WriteReg(Ph2_HwDescription::Chip* pChip, uint16_t pAddr
uint16_t D19clpGBTInterface::ReadReg(Ph2_HwDescription::Chip* pChip, uint16_t pAddress)
{
setBoard(pChip->getBeBoardId());
uint16_t cReadBack = 0;
if(fUseOpticalLink) {
if(fUseCPB)
{
uint8_t cWorkerId = 16, cFunctionId = 2;
std::vector<uint32_t> cCommandVector;
cCommandVector.clear();
cCommandVector.push_back(cWorkerId << 24 | cFunctionId << 16 | pAddress << 0);
fBoardFW->WriteCommandCPB(pChip, cCommandVector);
auto cReplyVector = fBoardFW->ReadReplyCPB(pChip, 10);
cReadBack = cReplyVector[7] & 0xFF;
}
return fBoardFW->ReadLpGBTRegister(pAddress);
else
cReadBack = fBoardFW->ReadOptoLinkRegister(pChip, pAddress);
return fBoardFW->ReadOptoLinkRegister(pChip, pAddress);
}
else
{
// use PS-ROH test card USB interface
#ifdef __TCUSB__
cReadBack = fTC_PSROH.read_i2c(pAddress);
return fTC_PSROH.read_i2c(pAddress);
#endif
}
LOG(DEBUG) << BOLDWHITE << "\t Reading 0x" << std::hex << +cReadBack << std::dec << " from [0x" << std::hex << +pAddress << std::dec << "]" << RESET;
return cReadBack;
return 0;
}
bool D19clpGBTInterface::WriteChipMultReg(Ph2_HwDescription::Chip* pChip, const std::vector<std::pair<std::string, uint16_t>>& pRegVec, bool pVerifLoop)
......
......@@ -20,12 +20,16 @@ namespace Ph2_HwInterface
class D19clpGBTInterface : public lpGBTInterface
{
public:
D19clpGBTInterface(const BeBoardFWMap& pBoardMap) : lpGBTInterface(pBoardMap) {}
D19clpGBTInterface(const BeBoardFWMap& pBoardMap) : lpGBTInterface(pBoardMap) {
#ifdef __TCUSB__
TC_PSROH fTC_PSROH;
fTC_PSROH = new TC_PSROH();
#endif
}
~D19clpGBTInterface() {
#ifdef __TCUSB__
delete fTC_PSROH;
#endif
}
// ###################################
// # LpGBT register access functions #
// ###################################
......@@ -203,6 +207,7 @@ class D19clpGBTInterface : public lpGBTInterface
bool fUseOpticalLink = true;
bool fUseCPB = true;
#ifdef __TCUSB__
TC_PSROH* fTC_PSROH;
std::map<std::string, TC_PSROH::measurement> fResetLines = {{"L_MPA", TC_PSROH::measurement::L_MPA_RST},
{"L_CIC", TC_PSROH::measurement::L_CIC_RST},
{"L_SSA", TC_PSROH::measurement::L_SSA_RST},
......
......@@ -237,10 +237,15 @@ class RD53FWInterface : public BeBoardFWInterface
void ResetOptoLink(Ph2_HwDescription::Chip* pChip) override;
bool WriteOptoLinkRegister(Ph2_HwDescription::Chip* pChip, uint32_t pAddress, uint32_t pData, bool pVerifLoop = false) override;
uint32_t ReadOptoLinkRegister(Ph2_HwDescription::Chip* pChip, uint32_t pAddress) override;
// # Read/Write new Command Processor Block #
// ##########################################
//functions for new Command Processor Block
void ResetCPB(Ph2_HwDescription::Chip* pChip) override {}
void WriteCommandCPB(Ph2_HwDescription::Chip* pChip, const std::vector<uint32_t>& pData) override {}
std::vector<uint32_t> ReadReplyCPB(Ph2_HwDescription::Chip* pChip, uint8_t pNWords, bool pDryRead) override {return {0};}
void ResetCPB() {}
void WriteCommandCPB(const std::vector<uint32_t>& pCommandVector) override {}
std::vector<uint32_t> ReadReplyCPB(uint8_t pNWords) override {return {0};}
//function to read/write lpGBT registers
bool WriteLpGBTRegister(uint16_t pRegisterAddress, uint8_t pRegisterValue, bool pVerifLoop = true) override {return true;}
uint8_t ReadLpGBTRegister(uint16_t pRegisterValue) override {return 0;}
// ###########################################
// # Member functions to handle the firmware #
......
......@@ -220,22 +220,7 @@ void SystemController::ConfigureHw(bool bIgnoreI2c)
{
// cLPGBT = true;
D19clpGBTInterface* clpGBTInterface = static_cast<D19clpGBTInterface*>(flpGBTInterface);
// To be uncommented if crate is used
// clpGBTInterface->SetConfigMode(cOpticalGroup->flpGBT, "i2c", false);
clpGBTInterface->SetConfigMode(cOpticalGroup->flpGBT, "serial", false);
clpGBTInterface->ConfigureChip(cOpticalGroup->flpGBT);
clpGBTInterface->PrintChipMode(cOpticalGroup->flpGBT);
uint8_t cPUSMStatus = clpGBTInterface->GetPUSMStatus(cOpticalGroup->flpGBT);
uint16_t cIter = 0, cMaxIter = 2000;
while(cPUSMStatus != 18 && cIter < cMaxIter)
{
LOG(INFO) << BOLDRED << "lpGBT not configured [NOT READY] -- PUSM status = " << +cPUSMStatus << RESET;
cPUSMStatus = clpGBTInterface->GetPUSMStatus(cOpticalGroup->flpGBT);
cIter++;
}
if(cPUSMStatus != 18) exit(0);
LOG(INFO) << BOLDGREEN << "lpGBT Configured [READY]" << RESET;
// clpGBTInterface->SetConfigMode(cOpticalGroup->flpGBT, "serial", true);
}
}
/*
......
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