Commit 2c85ffb1 authored by Sarah Seif El Nasr's avatar Sarah Seif El Nasr
Browse files

DEBUG - resgister test read from memory

parent 99408b4a
......@@ -5721,20 +5721,20 @@ bool D19cFWInterface::I2CWrite(uint8_t pLinkId, uint8_t pMasterId, uint8_t pSlav
size_t cIter = 0, cMaxIter = fCPBConfig.fMaxAttempts;
while(fI2Cstatus != 4 && cIter < cMaxIter && fCPBConfig.fReTry)
{
// reset link
this->WriteReg("fc7_daq_ctrl.optical_block.general", 0x1);
std::this_thread::sleep_for(std::chrono::milliseconds(2000));
this->WriteReg("fc7_daq_ctrl.optical_block.general", 0x0);
std::this_thread::sleep_for(std::chrono::milliseconds(100));
// // reset link
// this->WriteReg("fc7_daq_ctrl.optical_block.general", 0x1);
// std::this_thread::sleep_for(std::chrono::milliseconds(2000));
// this->WriteReg("fc7_daq_ctrl.optical_block.general", 0x0);
// std::this_thread::sleep_for(std::chrono::milliseconds(100));
ResetLink(pLinkId);
// ResetLink(pLinkId);
// reset I2C master
std::vector<uint8_t> cBitPosition = {2, 1, 0};
uint8_t cResetMask = (1 << cBitPosition[pMasterId]);
WriteLpGBTRegister(pLinkId, 0x12c, 0, true);
WriteLpGBTRegister(pLinkId, 0x12c, cResetMask, true);
WriteLpGBTRegister(pLinkId, 0x12c, 0, true);
// // reset I2C master
// std::vector<uint8_t> cBitPosition = {2, 1, 0};
// uint8_t cResetMask = (1 << cBitPosition[pMasterId]);
// WriteLpGBTRegister(pLinkId, 0x12c, 0, true);
// WriteLpGBTRegister(pLinkId, 0x12c, cResetMask, true);
// WriteLpGBTRegister(pLinkId, 0x12c, 0, true);
if(fI2Cstatus != 4)
LOG(DEBUG) << BOLDMAGENTA << "[D19cFWInterface::I2CWrite] Iter#" << +cIter << " I2CM" << +pMasterId << " status indicates a failure 0x" << std::hex << +fI2Cstatus << std::dec
......@@ -5784,20 +5784,20 @@ uint8_t D19cFWInterface::I2CRead(uint8_t pLinkId, uint8_t pMasterId, uint8_t pSl
cFail = cFail && (cI2CReadByteRegAddr && cIter < cMaxIter && fCPBConfig.fReTry);
while(cFail)
{
// reset link
this->WriteReg("fc7_daq_ctrl.optical_block.general", 0x1);
std::this_thread::sleep_for(std::chrono::milliseconds(2000));
this->WriteReg("fc7_daq_ctrl.optical_block.general", 0x0);
std::this_thread::sleep_for(std::chrono::milliseconds(100));
// // reset link
// this->WriteReg("fc7_daq_ctrl.optical_block.general", 0x1);
// std::this_thread::sleep_for(std::chrono::milliseconds(2000));
// this->WriteReg("fc7_daq_ctrl.optical_block.general", 0x0);
// std::this_thread::sleep_for(std::chrono::milliseconds(100));
ResetLink(pLinkId);
// ResetLink(pLinkId);
// reset I2C master
std::vector<uint8_t> cBitPosition = {2, 1, 0};
uint8_t cResetMask = (1 << cBitPosition[pMasterId]);
WriteLpGBTRegister(pLinkId, 0x12c, 0, true);
WriteLpGBTRegister(pLinkId, 0x12c, cResetMask, true);
WriteLpGBTRegister(pLinkId, 0x12c, 0, true);
// // reset I2C master
// std::vector<uint8_t> cBitPosition = {2, 1, 0};
// uint8_t cResetMask = (1 << cBitPosition[pMasterId]);
// WriteLpGBTRegister(pLinkId, 0x12c, 0, true);
// WriteLpGBTRegister(pLinkId, 0x12c, cResetMask, true);
// WriteLpGBTRegister(pLinkId, 0x12c, 0, true);
if(cIter == cMaxIter - 1) LOG(INFO) << BOLDRED << "[D19cFWInterface::I2CRead] : Received corrupted reply from command processor block ... retrying" << RESET;
ResetCPB();
......
......@@ -3,69 +3,69 @@
*--------------------------------------------------------------------------------
* RegName Page Addr Defval Value
*--------------------------------------------------------------------------------
FeCtrl&TrgLat2 0x00 0x00 0x3C 0x40
TriggerLatency1 0x00 0x01 0xC8 0xC8
FeCtrl&TrgLat2 0x00 0x00 0x7c 0x40
TriggerLatency1 0x00 0x01 0xc8 0xC8
BetaMult&SLVS 0x00 0x02 0x18 0x57
Ipre1 0x00 0x03 0x46 0x2D
Ipre2 0x00 0x04 0x2E 0x50
Ipre1 0x00 0x03 0x0a 0x2D
Ipre2 0x00 0x04 0x2e 0x50
Ipsf 0x00 0x05 0x7A 0x50
Ipa 0x00 0x06 0x6A 0x50
Ipaos 0x00 0x07 0x4B 0x2D
Icomp 0x00 0x09 0x23 0x23
Vplus1&2 0x00 0x0B 0x77 0x77
HIP&TestMode 0x00 0x0C 0x00 0x00
HIP&TestMode 0x00 0x0C 0x10 0x00
TestPulsePotNodeSel 0x00 0x0D 0x00 0x00
TestPulseDel&ChanGroup 0x00 0x0E 0x00 0x00
MiscTestPulseCtrl&AnalogMux 0x00 0x0F 0x00 0x20
CALIbias 0x00 0x10 0x10 0x63
CALVcasc 0x00 0x11 0x11 0x3F
CALIbias 0x00 0x10 0x64 0x63
CALVcasc 0x00 0x11 0x3f 0x3F
Pipe&StubInpSel&Ptwidth 0x00 0x12 0x03 0x5F
CoincWind&Offset34 0x00 0x13 0x00 0x00
CoincWind&Offset12 0x00 0x14 0x00 0x00
BandgapFuse 0x00 0x15 0x94 0x40
BandgapFuse 0x00 0x15 0x00 0x40
ChipIDFuse1 0x00 0x16 0x00 0x00
ChipIDFuse2 0x00 0x17 0x00 0x00
ChipIDFuse3 0x00 0x18 0x00 0x00
LayerSwap&CluWidth 0x00 0x1B 0x00 0x04
40MhzClk&Or254 0x00 0x1C 0x00 0x84
*SerialIface&Error 0x00 0x1D 0x00 0x40
*SerialIface&Error 0x00 0x1D 0x05 0x40
*--------------------------------------------------------------------------------
* Channel Masks
*--------------------------------------------------------------------------------
* RegName Page Addr Defval Value
*--------------------------------------------------------------------------------
MaskChannel-008-to-001 0x00 0x20 0x00 0xFF
MaskChannel-016-to-009 0x00 0x21 0x00 0xFF
MaskChannel-024-to-017 0x00 0x22 0x00 0xFF
MaskChannel-032-to-025 0x00 0x23 0x00 0xFF
MaskChannel-040-to-033 0x00 0x24 0x00 0xFF
MaskChannel-048-to-041 0x00 0x25 0x00 0xFF
MaskChannel-056-to-049 0x00 0x26 0x00 0xFF
MaskChannel-064-to-057 0x00 0x27 0x00 0xFF
MaskChannel-072-to-065 0x00 0x28 0x00 0xFF
MaskChannel-080-to-073 0x00 0x29 0x00 0xFF
MaskChannel-088-to-081 0x00 0x2A 0x00 0xFF
MaskChannel-096-to-089 0x00 0x2B 0x00 0xFF
MaskChannel-104-to-097 0x00 0x2C 0x00 0xFF
MaskChannel-112-to-105 0x00 0x2D 0x00 0xFF
MaskChannel-120-to-113 0x00 0x2E 0x00 0xFF
MaskChannel-128-to-121 0x00 0x2F 0x00 0xFF
MaskChannel-136-to-129 0x00 0x30 0x00 0xFF
MaskChannel-144-to-137 0x00 0x31 0x00 0xFF
MaskChannel-152-to-145 0x00 0x32 0x00 0xFF
MaskChannel-160-to-153 0x00 0x33 0x00 0xFF
MaskChannel-168-to-161 0x00 0x34 0x00 0xFF
MaskChannel-176-to-169 0x00 0x35 0x00 0xFF
MaskChannel-184-to-177 0x00 0x36 0x00 0xFF
MaskChannel-192-to-185 0x00 0x37 0x00 0xFF
MaskChannel-200-to-193 0x00 0x38 0x00 0xFF
MaskChannel-208-to-201 0x00 0x39 0x00 0xFF
MaskChannel-216-to-209 0x00 0x3A 0x00 0xFF
MaskChannel-224-to-217 0x00 0x3B 0x00 0xFF
MaskChannel-232-to-225 0x00 0x3C 0x00 0xFF
MaskChannel-240-to-233 0x00 0x3D 0x00 0xFF
MaskChannel-248-to-241 0x00 0x3E 0x00 0xFF
MaskChannel-254-to-249 0x00 0x3F 0x00 0xFF
MaskChannel-008-to-001 0x00 0x20 0xFF 0xFF
MaskChannel-016-to-009 0x00 0x21 0xFF 0xFF
MaskChannel-024-to-017 0x00 0x22 0xFF 0xFF
MaskChannel-032-to-025 0x00 0x23 0xFF 0xFF
MaskChannel-040-to-033 0x00 0x24 0xFF 0xFF
MaskChannel-048-to-041 0x00 0x25 0xFF 0xFF
MaskChannel-056-to-049 0x00 0x26 0xFF 0xFF
MaskChannel-064-to-057 0x00 0x27 0xFF 0xFF
MaskChannel-072-to-065 0x00 0x28 0xFF 0xFF
MaskChannel-080-to-073 0x00 0x29 0xFF 0xFF
MaskChannel-088-to-081 0x00 0x2A 0xFF 0xFF
MaskChannel-096-to-089 0x00 0x2B 0xFF 0xFF
MaskChannel-104-to-097 0x00 0x2C 0xFF 0xFF
MaskChannel-112-to-105 0x00 0x2D 0xFF 0xFF
MaskChannel-120-to-113 0x00 0x2E 0xFF 0xFF
MaskChannel-128-to-121 0x00 0x2F 0xFF 0xFF
MaskChannel-136-to-129 0x00 0x30 0xFF 0xFF
MaskChannel-144-to-137 0x00 0x31 0xFF 0xFF
MaskChannel-152-to-145 0x00 0x32 0xFF 0xFF
MaskChannel-160-to-153 0x00 0x33 0xFF 0xFF
MaskChannel-168-to-161 0x00 0x34 0xFF 0xFF
MaskChannel-176-to-169 0x00 0x35 0xFF 0xFF
MaskChannel-184-to-177 0x00 0x36 0xFF 0xFF
MaskChannel-192-to-185 0x00 0x37 0xFF 0xFF
MaskChannel-200-to-193 0x00 0x38 0xFF 0xFF
MaskChannel-208-to-201 0x00 0x39 0xFF 0xFF
MaskChannel-216-to-209 0x00 0x3A 0xFF 0xFF
MaskChannel-224-to-217 0x00 0x3B 0xFF 0xFF
MaskChannel-232-to-225 0x00 0x3C 0xFF 0xFF
MaskChannel-240-to-233 0x00 0x3D 0xFF 0xFF
MaskChannel-248-to-241 0x00 0x3E 0xFF 0xFF
MaskChannel-254-to-249 0x00 0x3F 0xFF 0xFF
*--------------------------------------------------------------------------------
* Bend LUT
......@@ -86,7 +86,7 @@ Bend10 0x00 0x4A 0x33 0x43
Bend11 0x00 0x4B 0x44 0x54
Bend12 0x00 0x4C 0x55 0x65
Bend13 0x00 0x4D 0x66 0x76
Bend14 0x00 0x4E 0x77 0x87
Bend14 0x00 0x4E 0x87 0x87
*--------------------------------------------------------------------------------
* V Threshold
......
......@@ -116,7 +116,7 @@ void RegisterTester::RegisterTest()
// container to store default register values after a hard reset
LOG(INFO) << BOLDMAGENTA << "Reading back default register values after a hard reset ..." << RESET;
LOG(INFO) << BOLDMAGENTA << "Reading back default register values after a hard reset ... using values stored in register map " << RESET;
DetectorDataContainer cDefRegListContainer;
ContainerFactory::copyAndInitChip<Registers>(*fDetectorContainer, cDefRegListContainer);
for(auto cBoard: *fDetectorContainer)
......@@ -136,7 +136,7 @@ void RegisterTester::RegisterTest()
if( std::find( cRegsToSkip.begin(), cRegsToSkip.end(), cListItem.first ) != cRegsToSkip.end() ) continue;
auto cRegItem = cListItem.second;
cRegItem.fValue = cChip->getReg( cListItem.first ).fDefValue;//fReadoutChipInterface->ReadChipReg(cChip, cListItem.first);
cRegItem.fValue = (uint8_t)( cChip->getRegItem( cListItem.first ).fDefValue );//fReadoutChipInterface->ReadChipReg(cChip, cListItem.first);
cList.push_back(std::make_pair(cListItem.first, cRegItem));
LOG (DEBUG) << BOLDMAGENTA << "Default value after a hard reset of register " << cListItem.first << " is 0x"
<< std::hex << +cRegItem.fValue << std::dec
......
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