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Commit c6b45b56 authored by Sarah Seif El Nasr's avatar Sarah Seif El Nasr
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Merged with Sarah

parents 078ea367 9e087159
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HWDescription/Chip.h
View file @ c6b45b56
......@@ -153,6 +153,14 @@ class Chip : public FrontEndDescription
cRegMask = ~(cRegMask);
setReg( pReg, (getReg(pReg) & cRegMask) | (pValue<< pMask.fBitShift) );
}
// retrieve some bits of register
uint16_t getRegBits( const std::string& pReg, ChipRegMask pMask )
{
uint16_t cMask = 0x00;
for(uint8_t cIndx=0; cIndx < pMask.fNbits; cIndx++) cMask = cMask | ( 1 << cIndx);
uint16_t cRegMask = (cMask << pMask.fBitShift);
return ((getReg(pReg) & cRegMask) >> pMask.fBitShift);
}
protected:
uint8_t fChipId;
uint16_t fMaxRegValue;
......
HWInterface/CbcInterface.cc
View file @ c6b45b56
......@@ -21,7 +21,7 @@ using namespace Ph2_HwDescription;
namespace Ph2_HwInterface
{
CbcInterface::CbcInterface(const BeBoardFWMap& pBoardMap) : ReadoutChipInterface(pBoardMap) { fActiveChannels.reset(); }
CbcInterface::CbcInterface(const BeBoardFWMap& pBoardMap) : ReadoutChipInterface(pBoardMap) { fActiveChannels.reset(); resetPageMap(); }
CbcInterface::~CbcInterface() {}
......@@ -560,7 +560,10 @@ bool CbcInterface::ConfigurePage(Chip* pCbc, uint8_t pPage, bool pVerifLoop)
bool cMapWasEmpty = false;
if(cIter == fPageMap.end())
{
uint8_t cDefaultPage = 0;
auto cValue = ReadChipSingleReg(pCbc, "FeCtrl&TrgLat2");
ChipRegMask cMask; cMask.fBitShift=7; cMask.fNbits=1;
uint8_t cDefaultPage = pCbc->getRegBits( "FeCtrl&TrgLat2",cMask );
LOG (DEBUG) << BOLDMAGENTA << "Default page on CBC" << +pCbc->getId() << " on hybrid " << +pCbc->getHybridId() << " is " << +cDefaultPage << " register value is 0x" << std::hex << +cValue << std::dec << RESET;
fPageMap.insert(std::make_pair(cAddress, cDefaultPage));
cMapWasEmpty=true;
}
......@@ -627,7 +630,7 @@ bool CbcInterface::WriteChipSingleReg(Chip* pCbc, const std::string& pRegNode, u
}
else
{
cSuccess = ConfigurePage(pCbc, cRegItem.fPage, pVerifLoop);
cSuccess = ( pRegNode == "FeCtrl&TrgLat2" ) ? true : ConfigurePage(pCbc, cRegItem.fPage, pVerifLoop);
if(!cSuccess) return cSuccess;
// read only register
if(pRegNode.find("ChipIDFuse") != std::string::npos) { pVerifLoop = false; }
......@@ -654,7 +657,13 @@ uint8_t CbcInterface::GetLastPage(Chip* pCbc)
uint32_t cAddress = (pCbc->getBeBoardId() << 16) | (pCbc->getHybridId() << 8) | pCbc->getId();
auto cIter = fPageMap.find(cAddress);
if(cIter == fPageMap.end())
return 6;
{
auto cValue = ReadChipSingleReg(pCbc, "FeCtrl&TrgLat2");
ChipRegMask cMask; cMask.fBitShift=7; cMask.fNbits=1;
uint8_t cDefaultPage = pCbc->getRegBits( "FeCtrl&TrgLat2",cMask );
LOG (INFO) << BOLDMAGENTA << "Default page on CBC" << +pCbc->getId() << " on hybrid " << +pCbc->getHybridId() << " is " << +cDefaultPage << " register value is 0x" << std::hex << +cValue << std::dec << RESET;
return cDefaultPage;
}
else
return cIter->second;
}
......@@ -691,7 +700,10 @@ bool CbcInterface::WriteChipMultReg(Chip* pCbc, const std::vector<std::pair<std:
auto cIter = fPageMap.find(cAddress);
if(cIter == fPageMap.end())
{
uint8_t cDefaultPage = 0;
auto cValue = ReadChipSingleReg(pCbc, "FeCtrl&TrgLat2");
ChipRegMask cMask; cMask.fBitShift=7; cMask.fNbits=1;
uint8_t cDefaultPage = pCbc->getRegBits( "FeCtrl&TrgLat2",cMask );
LOG (DEBUG) << BOLDMAGENTA << "Default page on CBC" << +pCbc->getId() << " on hybrid " << +pCbc->getHybridId() << " is " << +cDefaultPage << " register value is 0x" << std::hex << +cValue << std::dec << RESET;
fPageMap.insert(std::make_pair(cAddress, cDefaultPage));
}
cIter = fPageMap.find(cAddress);
......@@ -816,7 +828,7 @@ uint8_t CbcInterface::ReadChipSingleReg(Chip* pCbc, const std::string& pRegNode)
else
{
bool cVerifLoop = true;
bool cSuccess = ConfigurePage(pCbc, cRegItem.fPage, cVerifLoop);
bool cSuccess = ( pRegNode == "FeCtrl&TrgLat2" ) ? true : ConfigurePage(pCbc, cRegItem.fPage, cVerifLoop);
if(cSuccess) cValue = fBoardFW->ReadFERegister(pCbc, cRegItem.fAddress);
}
pCbc->setReg(pRegNode, cRegItem.fValue);
......
HWInterface/D19cFWInterface.cc
View file @ c6b45b56
......@@ -418,7 +418,35 @@ void D19cFWInterface::powerAllFMCs(bool pEnable)
this->WriteReg("sysreg.fmc_pwr.l12_pwr_en", (int)pEnable);
this->WriteReg("sysreg.fmc_pwr.l8_pwr_en", (int)pEnable);
}
bool D19cFWInterface::ResetLink(uint8_t pLinkId)
{
// reset here for good measure
uint32_t cCommand = (0x0 << 22) | ((pLinkId & 0x3f) << 26);
this->WriteReg("fc7_daq_ctrl.optical_block.general", cCommand);
std::this_thread::sleep_for(std::chrono::milliseconds(200));
// get link status
cCommand = (0x1 << 22) | ((pLinkId & 0x3f) << 26);
this->WriteReg("fc7_daq_ctrl.optical_block.general", cCommand);
std::this_thread::sleep_for(std::chrono::milliseconds(200));
bool cGBTxLocked = true;
// read back status register
LOG(INFO) << BOLDBLUE << "GBT Link Status..." << RESET;
uint32_t cLinkStatus = this->ReadReg("fc7_daq_stat.optical_block");
LOG(INFO) << BOLDBLUE << "GBT Link" << +pLinkId << " status " << std::bitset<32>(cLinkStatus) << RESET;
std::vector<std::string> cStates = {"GBT TX Ready", "MGT Ready", "GBT RX Ready"};
uint8_t cIndex = 1;
for(auto cState: cStates)
{
uint8_t cStatus = (cLinkStatus >> (3 - cIndex)) & 0x1;
cGBTxLocked &= (cStatus == 1);
if(cStatus == 1)
LOG(INFO) << BOLDBLUE << "\t... " << cState << BOLDGREEN << "\t : LOCKED" << RESET;
else
LOG(INFO) << BOLDBLUE << "\t... " << cState << BOLDRED << "\t : FAILED" << RESET;
cIndex++;
}
return cGBTxLocked;
}
bool D19cFWInterface::LinkLock(const BeBoard* pBoard)
{
std::lock_guard<std::mutex> theGuard(fMutex);
......@@ -439,32 +467,8 @@ bool D19cFWInterface::LinkLock(const BeBoard* pBoard)
for(auto cOpticalReadout: *pBoard)
{
uint8_t cLinkId = cOpticalReadout->getId();
// reset here for good measure
uint32_t cCommand = (0x0 << 22) | ((cLinkId & 0x3f) << 26);
this->WriteReg("fc7_daq_ctrl.optical_block.general", cCommand);
std::this_thread::sleep_for(std::chrono::milliseconds(200));
// get link status
cCommand = (0x1 << 22) | ((cLinkId & 0x3f) << 26);
this->WriteReg("fc7_daq_ctrl.optical_block.general", cCommand);
std::this_thread::sleep_for(std::chrono::milliseconds(200));
bool cGBTxLocked = true;
// read back status register
LOG(INFO) << BOLDBLUE << "GBT Link Status..." << RESET;
uint32_t cLinkStatus = this->ReadReg("fc7_daq_stat.optical_block");
LOG(INFO) << BOLDBLUE << "GBT Link" << +cLinkId << " status " << std::bitset<32>(cLinkStatus) << RESET;
std::vector<std::string> cStates = {"GBT TX Ready", "MGT Ready", "GBT RX Ready"};
uint8_t cIndex = 1;
for(auto cState: cStates)
{
uint8_t cStatus = (cLinkStatus >> (3 - cIndex)) & 0x1;
cGBTxLocked &= (cStatus == 1);
if(cStatus == 1)
LOG(INFO) << BOLDBLUE << "\t... " << cState << BOLDGREEN << "\t : LOCKED" << RESET;
else
LOG(INFO) << BOLDBLUE << "\t... " << cState << BOLDRED << "\t : FAILED" << RESET;
cIndex++;
}
cLinksLocked = cLinksLocked && cGBTxLocked;
bool cLocked = ResetLink(cLinkId);
cLinksLocked = cLinksLocked && cLocked;
}
if(cLinksLocked)
{
......@@ -527,7 +531,8 @@ bool D19cFWInterface::GBTLock(const BeBoard* pBoard)
else
{
LOG(INFO) << BOLDRED << "Switching off the LV using Power Supply Server..." << RESET;
fPowerSupplyClient->sendAndReceivePacket("TurnOff,PowerSupplyId:MyRohdeSchwarz,ChannelId:LV_Module3");
fPowerSupplyClient->sendAndReceivePacket("TurnOff,PowerSupplyId:MyTTi,ChannelId:LV_Module");
//fPowerSupplyClient->sendAndReceivePacket("TurnOff,PowerSupplyId:MyRohdeSchwarz,ChannelId:LV_Module3");
std::this_thread::sleep_for(std::chrono::milliseconds(1000));
}
// system("/home/modtest/Programming/power_supply/bin/TurnOff -c /home/modtest/Programming/power_supply/config/config.xml ");
......@@ -555,7 +560,7 @@ bool D19cFWInterface::GBTLock(const BeBoard* pBoard)
else
{
LOG(INFO) << BOLDRED << "Switching on the LV using Power Supply Server..." << RESET;
fPowerSupplyClient->sendAndReceivePacket("TurnOn,PowerSupplyId:MyRohdeSchwarz,ChannelId:LV_Module3");
fPowerSupplyClient->sendAndReceivePacket("TurnOn,PowerSupplyId:MyTTi,ChannelId:LV_Module");
std::this_thread::sleep_for(std::chrono::milliseconds(1000));
}
// system("/home/modtest/Programming/power_supply/bin/TurnOn -c /home/modtest/Programming/power_supply/config/config.xml ");
......@@ -616,7 +621,7 @@ void D19cFWInterface::configureLink(const BeBoard* pBoard)
if(cSCAenabled == 1) LOG(INFO) << BOLDBLUE << "SCA enabled successfully." << RESET;
cGBTx.scaConfigureGPIO(this);
// configure GBTx
bool cRisingEdge = true;
bool cRisingEdge = false;
// cGBTx.gbtxResetPhaseShifterClocks(this);
cGBTx.gbtxConfigureChargePumps(this);
cGBTx.gbtxResetPhaseShifterClocks(this);
......@@ -624,7 +629,7 @@ void D19cFWInterface::configureLink(const BeBoard* pBoard)
cGBTx.gbtxConfigure(this);
cGBTx.gbtxSetPhase(this, fGBTphase);
cGBTx.gbtxSelectEdgeTx(this, cRisingEdge);
cGBTx.gbtxSelectTerminationRx(this, true);
cGBTx.gbtxSelectTerminationRx(this, false);
cGBTx.gbtxSetDriveStrength(this, 0xa);
}
}
......@@ -1499,29 +1504,80 @@ void D19cFWInterface::ConfigureFastCommandBlock(const BeBoard* pBoard)
WriteReg("fc7_daq_ctrl.fast_command_block.control.load_config", 0x1);
}
void D19cFWInterface::L1ADebug(uint8_t pWait_ms)
void D19cFWInterface::L1ADebug(uint8_t pWait_ms, bool pPrint )
{
// this->ConfigureTriggerFSM(0, 10, 3);
// disable back-pressure
this->WriteReg("fc7_daq_cnfg.fast_command_block.misc.backpressure_enable", 0);
this->Start();
std::this_thread::sleep_for(std::chrono::microseconds(pWait_ms * 1000));
this->Stop();
// use generic fast command block to send ReSync + L1A
this->ResetFCMDBram();
std::vector<uint8_t> cFastCommands(0);cFastCommands.clear();
size_t cL1toClear = 10;
size_t cAfterClear = 5000;
size_t cDelayAfterReSync = this->ReadReg("fc7_daq_cnfg.fast_command_block.test_pulse.delay_after_fast_reset");
size_t cDelayAfterTP = this->ReadReg("fc7_daq_cnfg.fast_command_block.test_pulse.delay_after_test_pulse");
size_t cDelayToNext = this->ReadReg("fc7_daq_cnfg.fast_command_block.test_pulse.delay_before_next_pulse");
LOG (INFO) << BOLDMAGENTA << "Delay after ReSync : " << cDelayAfterReSync << " Delay after TP : " << cDelayAfterTP << RESET;
for(size_t cIndx=0; cIndx < 14000 ; cIndx++)
{
if( cIndx == 0 ) cFastCommands.push_back( 0xC3 ); // BC0 to reset L1 capture
else if( cIndx == cL1toClear ) cFastCommands.push_back( 0xC9 ); // flush L1A FIFO
else if( cIndx == cL1toClear+cAfterClear ) cFastCommands.push_back( 0xD3 ); // send a ReSync+BC0
else if ( cIndx == cL1toClear+cAfterClear+cDelayAfterReSync ) cFastCommands.push_back( 0xC5 ); // send a TP injection
else if ( cIndx == cL1toClear+cAfterClear+cDelayAfterReSync+cDelayAfterTP ) cFastCommands.push_back( 0xC9 ); // send an L1A
else if ( cIndx == cL1toClear+cAfterClear+cDelayAfterReSync+cDelayAfterTP+cDelayToNext ) cFastCommands.push_back( 0xC9 ); // send another L1A
else cFastCommands.push_back( 0xC1 );
}
ConfigureFCMDBram(cFastCommands);
// repeat the sequence N times
this->WriteReg("fc7_daq_cnfg.readout_block.global.data_handshake_enable", 0x00);
this->WriteReg("fc7_daq_cnfg.readout_block.packet_nbr", 1);
this->WriteReg("fc7_daq_cnfg.fast_command_block.generic_fcmd.number_of_repetitions", 1);
// make sure fast command duration is 0
this->WriteReg("fc7_daq_ctrl.fast_command_block.control.fast_duration", 0x0);
// make sure all triggers are accepted
this->WriteReg("fc7_daq_cnfg.fast_command_block.triggers_to_accept", 1);
ResetTriggerFSM();
//this->Compose_fast_command(fFastCommandDuration, 0, 0, 0, 1);
// start generic - ctrl signal high
this->WriteReg("fc7_daq_ctrl.fast_command_block.control.start_generic", 0x1);
this->WriteReg("fc7_daq_ctrl.fast_command_block.control.start_generic", 0x0);
// this->WriteReg("fc7_daq_cnfg.fast_command_block.misc.backpressure_enable", 0);
// this->Start();
// std::this_thread::sleep_for(std::chrono::microseconds(pWait_ms * 1000));
// this->Stop();
auto cWords = ReadBlockReg("fc7_daq_stat.physical_interface_block.l1a_debug", 50);
LOG(INFO) << BOLDBLUE << "Hits debug ...." << RESET;
LOG(DEBUG) << BOLDBLUE << "Hits debug ...." << RESET;
std::string cBuffer = "";
size_t cLineIndx=0;
for(auto cWord: cWords)
{
auto cString = std::bitset<32>(cWord).to_string();
std::vector<std::string> cOutputWords(0);
for(size_t cIndex = 0; cIndex < 4; cIndex++) { cOutputWords.push_back(cString.substr(cIndex * 8, 8)); }
std::string cOutput = "";
for(auto cIt = cOutputWords.end() - 1; cIt >= cOutputWords.begin(); cIt--) { cOutput += *cIt + " "; }
LOG(INFO) << BOLDBLUE << cOutput << RESET;
}
this->ResetReadout();
for(auto cIt = cOutputWords.end() - 1; cIt >= cOutputWords.begin(); cIt--) { cOutput += *cIt + " "; cBuffer += *cIt;}
if( pPrint ) LOG(INFO) << BOLDBLUE << "#" << +cLineIndx << ":" << cOutput << RESET;
cLineIndx++;
}
size_t cOffset = 28;
auto cHeader = cBuffer.substr(4, cOffset); cOffset+=4;
auto cStatus = cBuffer.substr(cOffset, 9);cOffset+=9;
auto cL1Id = std::stoi( cBuffer.substr(cOffset, 9), 0 ,2 );cOffset+=9;
auto cCbcErr = cBuffer.substr(cOffset, 2); cOffset+=2;
auto cPipeAddr = std::stoi( cBuffer.substr(cOffset, 9),0,2); cOffset+=9;
auto cL1IdCbc = std::stoi( cBuffer.substr(cOffset, 9),0,2);cOffset+=9;
LOG (INFO) << BOLDMAGENTA << "Header is " << cHeader
<< " Status is " << cStatus
<< " L1Id is " << cL1Id
<< " CBC Error is " << cCbcErr
<< " Pipeaddress is " << cPipeAddr
<< " L1Id CBC is " << cL1IdCbc << RESET;
// this->ResetReadout();
}
std::vector<std::string> D19cFWInterface::StubDebug(bool pWithTestPulse, uint8_t pNlines)
{
......@@ -5665,6 +5721,21 @@ bool D19cFWInterface::I2CWrite(uint8_t pLinkId, uint8_t pMasterId, uint8_t pSlav
size_t cIter = 0, cMaxIter = fCPBConfig.fMaxAttempts;
while(fI2Cstatus != 4 && cIter < cMaxIter && fCPBConfig.fReTry)
{
// // reset link
// this->WriteReg("fc7_daq_ctrl.optical_block.general", 0x1);
// std::this_thread::sleep_for(std::chrono::milliseconds(2000));
// this->WriteReg("fc7_daq_ctrl.optical_block.general", 0x0);
// std::this_thread::sleep_for(std::chrono::milliseconds(100));
// ResetLink(pLinkId);
// // reset I2C master
// std::vector<uint8_t> cBitPosition = {2, 1, 0};
// uint8_t cResetMask = (1 << cBitPosition[pMasterId]);
// WriteLpGBTRegister(pLinkId, 0x12c, 0, true);
// WriteLpGBTRegister(pLinkId, 0x12c, cResetMask, true);
// WriteLpGBTRegister(pLinkId, 0x12c, 0, true);
if(fI2Cstatus != 4)
LOG(DEBUG) << BOLDMAGENTA << "[D19cFWInterface::I2CWrite] Iter#" << +cIter << " I2CM" << +pMasterId << " status indicates a failure 0x" << std::hex << +fI2Cstatus << std::dec
<< " transaction was to write " << +pNBytes << " to slave address " << +pSlaveAddress << " with data 0x" << std::hex << pSlaveData << std::dec << RESET;
......@@ -5713,6 +5784,21 @@ uint8_t D19cFWInterface::I2CRead(uint8_t pLinkId, uint8_t pMasterId, uint8_t pSl
cFail = cFail && (cI2CReadByteRegAddr && cIter < cMaxIter && fCPBConfig.fReTry);
while(cFail)
{
// // reset link
// this->WriteReg("fc7_daq_ctrl.optical_block.general", 0x1);
// std::this_thread::sleep_for(std::chrono::milliseconds(2000));
// this->WriteReg("fc7_daq_ctrl.optical_block.general", 0x0);
// std::this_thread::sleep_for(std::chrono::milliseconds(100));
// ResetLink(pLinkId);
// // reset I2C master
// std::vector<uint8_t> cBitPosition = {2, 1, 0};
// uint8_t cResetMask = (1 << cBitPosition[pMasterId]);
// WriteLpGBTRegister(pLinkId, 0x12c, 0, true);
// WriteLpGBTRegister(pLinkId, 0x12c, cResetMask, true);
// WriteLpGBTRegister(pLinkId, 0x12c, 0, true);
if(cIter == cMaxIter - 1) LOG(INFO) << BOLDRED << "[D19cFWInterface::I2CRead] : Received corrupted reply from command processor block ... retrying" << RESET;
ResetCPB();
std::this_thread::sleep_for(std::chrono::microseconds(50));
......@@ -5824,7 +5910,7 @@ void D19cFWInterface::ResetFCMDBram()
cRegs.push_back({"fc7_daq_cnfg.fast_command_block.generic_fcmd_addr", cBx});
cRegs.push_back({"fc7_daq_ctrl.fast_command_block.control.write_generic", 0x1});
cRegs.push_back({"fc7_daq_ctrl.fast_command_block.control.write_generic", 0x0});
if(cBx % (cBRAMdepth / 10) == 0) LOG(INFO) << BOLDBLUE << "\t... Bx..." << +cBx << RESET;
if(cBx % (cBRAMdepth / 10) == 0) LOG(DEBUG) << BOLDBLUE << "\t... Bx..." << +cBx << RESET;
}
this->WriteStackReg(cRegs);
LOG(DEBUG) << BOLDBLUE << "Resetting FCMD BRAM from sw..... done" << RESET;
......
HWInterface/D19cFWInterface.h
View file @ c6b45b56
......@@ -420,7 +420,7 @@ class D19cFWInterface : public BeBoardFWInterface
// consecutive triggers FSM
void ConfigureAntennaFSM(uint16_t pNtriggers = 1, uint16_t pTriggerRate = 1, uint16_t pL1Delay = 100);
void L1ADebug(uint8_t pWait_ms = 1);
void L1ADebug(uint8_t pWait_ms = 1, bool pPrint = true);
std::vector<std::string> StubDebug(bool pWithTestPulse = true, uint8_t pNlines = 5);
std::vector<std::string> ScopeStubLines(bool pWithTestPulse = true);
bool L1PhaseTuning(const Ph2_HwDescription::BeBoard* pBoard, bool pScope = false);
......@@ -432,6 +432,7 @@ class D19cFWInterface : public BeBoardFWInterface
// Optical readout specific functions - d19c [temporary]
void setGBTxPhase(uint32_t pPhase) { fGBTphase = pPhase; }
void configureLink(const Ph2_HwDescription::BeBoard* pBoard);
bool ResetLink(uint8_t pLinkId);
bool LinkLock(const Ph2_HwDescription::BeBoard* pBoard);
bool GBTLock(const Ph2_HwDescription::BeBoard* pBoard);
std::pair<uint16_t, float> readADC(std::string pValueToRead = "AMUX_L", bool pApplyCorrection = false);
......@@ -499,15 +500,15 @@ class D19cFWInterface : public BeBoardFWInterface
if(fType == 0)
{
LOG(INFO) << "\t\t Mode: " << +fMode;
LOG(INFO) << "\t\t Manual Delay: " << +fDelay << ", Manual Bitslip: " << +fBitslip;
LOG(DEBUG) << "\t\t Mode: " << +fMode;
LOG(DEBUG) << "\t\t Manual Delay: " << +fDelay << ", Manual Bitslip: " << +fBitslip;
cStatus = 1;
}
else if(fType == 1)
{
LOG(INFO) << "\t\t Done: " << +fDone << ", PA FSM: " << BOLDGREEN << fPhaseFSMStateMap[fPhaseAlignmentFSMstate] << RESET << ", WA FSM: " << BOLDGREEN
LOG(DEBUG) << "\t\t Done: " << +fDone << ", PA FSM: " << BOLDGREEN << fPhaseFSMStateMap[fPhaseAlignmentFSMstate] << RESET << ", WA FSM: " << BOLDGREEN
<< fWordFSMStateMap[fWordAlignmentFSMstate] << RESET;
LOG(INFO) << "\t\t Delay: " << +fDelay << ", Bitslip: " << +fBitslip;
LOG(DEBUG) << "\t\t Delay: " << +fDelay << ", Bitslip: " << +fBitslip;
cStatus = 1;
}
else if(fType == 6)
......
HWInterface/D19clpGBTInterface.cc
View file @ c6b45b56
......@@ -31,7 +31,7 @@ bool D19clpGBTInterface::ConfigureChip(Ph2_HwDescription::Chip* pChip, bool pVer
CPBconfig cCPBconfig;
cCPBconfig.fEnable = fUseCPB;
cCPBconfig.fI2CFrequency = 3;
cCPBconfig.fWait_us = 500; // TO-DO - make configurable from xml
cCPBconfig.fWait_us = 50; // TO-DO - make configurable from xml
cCPBconfig.fReTry = 1; // TO-DO - make configurable from xml
cCPBconfig.fVerbose = 0; // TO-DO - make configurable from xml
cCPBconfig.fMaxAttempts = 1000; // TO-DO - make configurable from xml
......@@ -64,7 +64,10 @@ bool D19clpGBTInterface::ConfigureChip(Ph2_HwDescription::Chip* pChip, bool pVer
cReady = IsPUSMDone(pChip);
cIter++;
}
if(cReady) LOG(INFO) << BOLDGREEN << "lpGBT Configured [READY]" << RESET;
if(cReady){
LOG(INFO) << BOLDGREEN << "lpGBT Configured [READY]" << RESET;
ResetI2C(pChip, {0, 1, 2});
}
if(!cReady) throw std::runtime_error(std::string("lpGBT Power-Up State Machine NOT DONE"));
// PrintChipMode(pChip);
return cReady;
......
HWInterface/GbtInterface.cc
View file @ c6b45b56
......@@ -290,6 +290,26 @@ void GbtInterface::gbtxSelectEdge(BeBoardFWInterface* pInterface, bool pRising)
LOG(INFO) << BOLDBLUE << "GBTx default configuration " << std::bitset<8>(cReadBack) << " -- will be set to " << std::bitset<8>(cRegValue) << RESET;
// icWrite(pInterface, 244 , cRegValue ) ;
}
void GbtInterface::gbtxAutoAlign(BeBoardFWInterface* pInterface, uint8_t pHybridId)
{
uint16_t cReg = 62;
// training mode
uint8_t cPhaseSelectMode = 0x01;
uint32_t cReadBack = icRead(pInterface, cReg, 1);
uint32_t cWrite = (cReadBack & 0xc0) | ((cPhaseSelectMode << 4) | (cPhaseSelectMode << 2) | (cPhaseSelectMode << 0));
icWrite(pInterface, cReg, cWrite);
// train channels
// 0,1,2,3,4,5
// gbtxEnableRxChannel(pInterface, 0, {0, 4});
// gbtxEnableRxChannel(pInterface, 1, {4});
// gbtxEnableRxChannel(pInterface, 2, {0, 4});
// gbtxEnableRxChannel(pInterface, 3, {0, 4});
// gbtxEnableRxChannel(pInterface, 4, {0, 4});
// gbtxEnableRxChannel(pInterface, 5, {1, 4});
// gbtxEnableRxChannel(pInterface, 6, {0, 4});
}
void GbtInterface::gbtxSetPhase(BeBoardFWInterface* pInterface, uint8_t pPhase)
{
uint16_t cReg = 62;
......
HWInterface/GbtInterface.h
View file @ c6b45b56
......@@ -79,6 +79,7 @@ class GbtInterface
void gbtxConfigure(Ph2_HwInterface::BeBoardFWInterface* pInterface, uint8_t pDLLcurrent = 11, uint8_t pDLLlockMode = 7);
void gbtxSelectTerminationRx(Ph2_HwInterface::BeBoardFWInterface* pInterface, bool pEnable = true);
void gbtxSetDriveStrength(Ph2_HwInterface::BeBoardFWInterface* pInterface, uint8_t pStrength = 0xA);
void gbtxAutoAlign(Ph2_HwInterface::BeBoardFWInterface* pInterface, uint8_t pHyridId=0);
struct RegConfig
{
......
System/SystemController.cc
View file @ c6b45b56
......@@ -131,15 +131,15 @@ void SystemController::InitializeHw(const std::string& pFilename, std::ostream&
this->fParser.parseHW(pFilename, fBeBoardFWMap, fDetectorContainer, os, pIsFile);
fBeBoardInterface = new BeBoardInterface(fBeBoardFWMap);
/*
fPowerSupplyClient = new TCPClient("192.168.122.123", 7000);
fPowerSupplyClient = new TCPClient("127.0.0.1", 7000);
if(!fPowerSupplyClient->connect(1))
{
delete fPowerSupplyClient;
fPowerSupplyClient = nullptr;
}
for(const auto board: *fDetectorContainer) fBeBoardInterface->setPowerSupplyClient(board, fPowerSupplyClient);
*/
if(fDetectorContainer->size() > 0)
{
......@@ -497,6 +497,20 @@ void SystemController::ConfigureOT(BeBoard* pBoard)
LOG(INFO) << BOLDMAGENTA << "Sending a ReSync at the end of the OT-module configuration step" << RESET;
// send a ReSync to all chips before starting
fBeBoardInterface->ChipReSync(pBoard);
// check resync request has been cleared
for(auto cOpticalGroup: *pBoard)
{
for(auto cHybrid: *cOpticalGroup)
{
auto& cCic = static_cast<OuterTrackerHybrid*>(cHybrid)->fCic;
if(cCic == NULL) continue;
if( fCicInterface->GetResyncRequest(cCic) ){
LOG (INFO) << BOLDRED << "ReSync request ofrom CIC" << +cHybrid->getId() << RESET;
throw std::runtime_error(std::string("FAILED to clear CIC ReSync request"));
}
}
}
}
else
LOG(INFO) << BOLDMAGENTA << "No ReSync needed after OT-module configuration step" << RESET;
......
settings/CbcFiles/CBC3_default.txt
View file @ c6b45b56
......@@ -3,69 +3,69 @@
*--------------------------------------------------------------------------------
* RegName Page Addr Defval Value
*--------------------------------------------------------------------------------
FeCtrl&TrgLat2 0x00 0x00 0x3C 0x40
TriggerLatency1 0x00 0x01 0xC8 0xC8
FeCtrl&TrgLat2 0x00 0x00 0x7c 0x40
TriggerLatency1 0x00 0x01 0xc8 0xC8
BetaMult&SLVS 0x00 0x02 0x18 0x57
Ipre1 0x00 0x03 0x46 0x2D
Ipre2 0x00 0x04 0x2E 0x50
Ipre1 0x00 0x03 0x0a 0x2D
Ipre2 0x00 0x04 0x2e 0x50
Ipsf 0x00 0x05 0x7A 0x50
Ipa 0x00 0x06 0x6A 0x50
Ipaos 0x00 0x07 0x4B 0x2D
Icomp 0x00 0x09 0x23 0x23
Vplus1&2 0x00 0x0B 0x77 0x77
HIP&TestMode 0x00 0x0C 0x00 0x00
HIP&TestMode 0x00 0x0C 0x10 0x00
TestPulsePotNodeSel 0x00 0x0D 0x00 0x00
TestPulseDel&ChanGroup 0x00 0x0E 0x00 0x00
MiscTestPulseCtrl&AnalogMux 0x00 0x0F 0x00 0x20
CALIbias 0x00 0x10 0x10 0x63
CALVcasc 0x00 0x11 0x11 0x3F
CALIbias 0x00 0x10 0x64 0x63
CALVcasc 0x00 0x11 0x3f 0x3F
Pipe&StubInpSel&Ptwidth 0x00 0x12 0x03 0x5F
CoincWind&Offset34 0x00 0x13 0x00 0x00
CoincWind&Offset12 0x00 0x14 0x00 0x00
BandgapFuse 0x00 0x15 0x94 0x40
BandgapFuse 0x00 0x15 0x00 0x40
ChipIDFuse1 0x00 0x16 0x00 0x00
ChipIDFuse2 0x00 0x17 0x00 0x00
ChipIDFuse3 0x00 0x18 0x00 0x00
LayerSwap&CluWidth 0x00 0x1B 0x00 0x04
40MhzClk&Or254 0x00 0x1C 0x00 0x84
*SerialIface&Error 0x00 0x1D 0x00 0x40
*SerialIface&Error 0x00 0x1D 0x05 0x40
*--------------------------------------------------------------------------------
* Channel Masks
*--------------------------------------------------------------------------------
* RegName Page Addr Defval Value
*--------------------------------------------------------------------------------
MaskChannel-008-to-001 0x00 0x20 0x00 0xFF
MaskChannel-016-to-009 0x00 0x21 0x00 0xFF
MaskChannel-024-to-017 0x00 0x22 0x00 0xFF
MaskChannel-032-to-025 0x00 0x23 0x00 0xFF
MaskChannel-040-to-033 0x00 0x24 0x00 0xFF
MaskChannel-048-to-041 0x00 0x25 0x00 0xFF
MaskChannel-056-to-049 0x00 0x26 0x00 0xFF
MaskChannel-064-to-057 0x00 0x27 0x00 0xFF
MaskChannel-072-to-065 0x00 0x28 0x00 0xFF
MaskChannel-080-to-073 0x00 0x29 0x00 0xFF
MaskChannel-088-to-081 0x00 0x2A 0x00 0xFF
MaskChannel-096-to-089 0x00 0x2B 0x00 0xFF
MaskChannel-104-to-097 0x00 0x2C 0x00 0xFF
MaskChannel-112-to-105 0x00 0x2D 0x00 0xFF
MaskChannel-120-to-113 0x00 0x2E 0x00 0xFF
MaskChannel-128-to-121 0x00 0x2F 0x00 0xFF
MaskChannel-136-to-129 0x00 0x30 0x00 0xFF
MaskChannel-144-to-137 0x00 0x31 0x00 0xFF
MaskChannel-152-to-145 0x00 0x32 0x00 0xFF
MaskChannel-160-to-153 0x00 0x33 0x00 0xFF
MaskChannel-168-to-161 0x00 0x34 0x00 0xFF
MaskChannel-176-to-169 0x00 0x35 0x00 0xFF
MaskChannel-184-to-177 0x00 0x36 0x00 0xFF
MaskChannel-192-to-185 0x00 0x37 0x00 0xFF
MaskChannel-200-to-193 0x00 0x38 0x00 0xFF
MaskChannel-208-to-201 0x00 0x39 0x00 0xFF
MaskChannel-216-to-209 0x00 0x3A 0x00 0xFF
MaskChannel-224-to-217 0x00 0x3B 0x00 0xFF
MaskChannel-232-to-225 0x00 0x3C 0x00 0xFF
MaskChannel-240-to-233 0x00 0x3D 0x00 0xFF
MaskChannel-248-to-241 0x00 0x3E 0x00 0xFF
MaskChannel-254-to-249 0x00 0x3F 0x00 0xFF
MaskChannel-008-to-001 0x00 0x20 0xFF 0xFF
MaskChannel-016-to-009 0x00 0x21 0xFF 0xFF
MaskChannel-024-to-017 0x00 0x22 0xFF 0xFF
MaskChannel-032-to-025 0x00 0x23 0xFF 0xFF
MaskChannel-040-to-033 0x00 0x24 0xFF 0xFF
MaskChannel-048-to-041 0x00 0x25 0xFF 0xFF
MaskChannel-056-to-049 0x00 0x26 0xFF 0xFF
MaskChannel-064-to-057 0x00 0x27 0xFF 0xFF
MaskChannel-072-to-065 0x00 0x28 0xFF 0xFF
MaskChannel-080-to-073 0x00 0x29 0xFF 0xFF
MaskChannel-088-to-081 0x00 0x2A 0xFF 0xFF
MaskChannel-096-to-089 0x00 0x2B 0xFF 0xFF
MaskChannel-104-to-097 0x00 0x2C 0xFF 0xFF
MaskChannel-112-to-105 0x00 0x2D 0xFF 0xFF
MaskChannel-120-to-113 0x00 0x2E 0xFF 0xFF
MaskChannel-128-to-121 0x00 0x2F 0xFF 0xFF
MaskChannel-136-to-129 0x00 0x30 0xFF 0xFF
MaskChannel-144-to-137 0x00 0x31 0xFF 0xFF
MaskChannel-152-to-145 0x00 0x32 0xFF 0xFF
MaskChannel-160-to-153 0x00 0x33 0xFF 0xFF
MaskChannel-168-to-161 0x00 0x34 0xFF 0xFF
MaskChannel-176-to-169 0x00 0x35 0xFF 0xFF
MaskChannel-184-to-177 0x00 0x36 0xFF 0xFF
MaskChannel-192-to-185 0x00 0x37 0xFF 0xFF
MaskChannel-200-to-193 0x00 0x38 0xFF 0xFF
MaskChannel-208-to-201 0x00 0x39 0xFF 0xFF
MaskChannel-216-to-209 0x00 0x3A 0xFF 0xFF
MaskChannel-224-to-217 0x00 0x3B 0xFF 0xFF
MaskChannel-232-to-225 0x00 0x3C 0xFF 0xFF
MaskChannel-240-to-233 0x00 0x3D 0xFF 0xFF
MaskChannel-248-to-241 0x00 0x3E 0xFF 0xFF
MaskChannel-254-to-249 0x00 0x3F 0xFF 0xFF
*--------------------------------------------------------------------------------
* Bend LUT
......@@ -86,7 +86,7 @@ Bend10 0x00 0x4A 0x33 0x43
Bend11 0x00 0x4B 0x44 0x54
Bend12 0x00 0x4C 0x55 0x65
Bend13 0x00 0x4D 0x66 0x76
Bend14 0x00 0x4E 0x77 0x87
Bend14 0x00 0x4E 0x87 0x87
*--------------------------------------------------------------------------------
* V Threshold
......