Tags give the ability to mark specific points in history as being important
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v6-19
804c5ba8 · ·Tag specific for the inner tracker Differences from tag v6-18 Ameliorations - Added histogram -Disabled2D- where users can find a 2D map of ONLY the pixels that were already disabled prior the current -PixelAlive- run - Changed way to compute -ThrAdj- start and stop scan range: now it's computed relative to the chip threshold - Now masking pixels before programming them and then we download the proper mask from txt file Bugfixes - Fixed bug with -Charge2VCal- performed from -firstChip- only
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v6-18
e7951b60 · ·Tag specific for OT Main updates since tag v6-16: - Added utility to identify disconnected wirebonds for 2S and PS - Retry BX0 alignement when one hybrid fails - Added lpGBT v2 setting file for OT - Corrected power setting in LpGBT v2 eye opening test - Added clear error message when OG id , FMCid, and FW are not compatible - Improved Scurves fits for PS modules - Added is calibrated flag for LpGBT, MPA and SSA Compatible with FW tag v3-03: https://udtc-ot-firmware.web.cern.ch/?dir=v3-03
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v6-13
4c044187 · ·Tag specific for OT Main updates since tag v6-11: - improved PS trimming to reduce number of outliers - corrected issue in storing the git tag in the root file - sending end of transmission message in VTRxLightOff - calculating pedestal used for occupancy test during SCurve for 2S and trimming for PS - manually lowered the SSA threshold from 5 to 4 sigma due to occupancy too low - avoiding unwanted configuration of the CDCE - preventing ECV from getting stuck Compatible with FW tag v3-03: https://udtc-ot-firmware.web.cern.ch/?dir=v3-03
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v6-12
f990796e · ·Tag specific for IT Update with respect tag v6-06: - Improved speed by 25% of Threshold Adjustment - Added support for AutoRead feature of the RD53 chip - Users can now use the AutoRead feature of the RD53 chip - CDCE reprogramming is now under control: - check if it was already programmed - check if the user really needs to re-program it - use of a secondary clock generator
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v6-09
d64f784d · ·Tag specific for OT: Main updates since tag v6-08 - Avoided L1 integrity test to get stuck - When an exception occurs is catched and the root file is saved before quitting - Rewriting best bitslip to ensure running stability - Using previous temperature measurement to calculate current for resistance measurement Compatible with FW tag v3-02: https://udtc-ot-firmware.web.cern.ch/?dir=v3-02
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v6-07
18ec507b · ·Tag specific for OT Main updates since tag v6-02 - Included Bit error rate test from LpGBT to FC7 - Included pattern checker for stub lines in the FW to speed up - Improvements in the L1 pattern checker to read fewer packets while keeping the same amount of tested bits - Improvements in the CM noise measurement for PS and 2S - Various improvements in histograms Compatible with FW tag v3-02: https://udtc-ot-firmware.web.cern.ch/?dir=v3-02
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v6-06
3ff505e1 · ·Tag specific for IT Update with respect tag v6-04: - Improved ThresholdAdjustment: remove periodic resets --> runs faster and it's more robust - Improved initialization sequence of CROC thanks to Fabio Luongo, see RD53BInterface (in InitRD53Uplinks swapped order Aurora config and ChannelBonding config) - Improved concurrent access to hardware (FC7) by different processes (now Monitoring should be more stable, without readout errors) - Faster ThresholdAdjustment algorithm thanks to Javier Sanchez
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v6-05
c16cfb60 · ·Tag specific for IT - Update with respect tag v6-04: - Avoid repetition RxGroup in cfg and add the possibility to configure uplink driver strength and pre-emphasis during UpLink initialization - Fixed a small bug in percentage running time when using multiple boards - Fixed bug in compilation for EUDAQ mode - Fixed bug in voltagetuning - Fixed bug in BER-test option chain2test=2 - Removed pPrmptCfg from Chip and fixed bug in LpGBT Compatible with IT FW tag 5.0
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v6-03
b3065f5b · ·Tag specific for IT - Implemented VTRx scan bias vs modulation - Implemented LpGBT eye diagram - Implemented readout of NTCs through LpGBT ADC (e.g. the NTC next to the VTRx) - No more FIFO readout errors when switching on Monitoring (many thanks to Fabio Luongo) - Fixed a small bug in the readout chip “enable” flag of XML file - Moved NTC parameters “beta” and “R@25C” to XML configuration file as requested by Sophie Rohletter in this presentation: https://indico.cern.ch/event/1485283/contributions/6260866/attachments/2981224/5249153/Temperature Readout NTC.pdf - Refined threshold adjustment (thradj) scan: long-standing issue with the stability of this scan because it unavoidably probes high-noise regions --> with the consequence of compromising the chip stability (sometimes we lose the AURORA communication) --> now, while exploring the high-noise region, we perform periodic reset/reconfiguration - MonitorData saved in the Results directory with run number --> requested by Thierry -Working with FW version 5.0