From 47540b0fb63724b88964e2cbc12d9640cc01905c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Laurent=20P=C3=A9tr=C3=A9?= <laurent.petre@cern.ch>
Date: Wed, 22 Mar 2023 20:00:50 +0100
Subject: [PATCH] Only toggle GPIO #9 when resetting the slave lpGBT
With the appropriate default lpGBT configuration, this commits avoids
any side effect on the master lpGBT from triggering an exernal slave
lpGBT reset. Side effects included, among others, incorrectly setting
the VFAT reset lines GPIO.
Updated default lpGBT configurations will fully configure the GPIO block
for "the system to just work": I/O direction, drive strength,
pull-up/down resistor, reset lifted,...
---
gemhardware/src/gbt.cpp | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/gemhardware/src/gbt.cpp b/gemhardware/src/gbt.cpp
index 1a752886..7eebb788 100644
--- a/gemhardware/src/gbt.cpp
+++ b/gemhardware/src/gbt.cpp
@@ -311,9 +311,8 @@ uint8_t gem::hardware::gbt::reset_slave_gbt(const uint32_t ohN, uint8_t gbtMask)
continue;
try {
- writeGBTReg(ohN, gbtN, 0x053, 0x02); // Configure GPIO #9 as output
- writeGBTReg(ohN, gbtN, 0x055, 0x00); // Set GPIO #9 low
- writeGBTReg(ohN, gbtN, 0x053, 0x00); // Configure GPIO #9 as input (lifts the reset)
+ writeGBTReg(ohN, gbtN, 0x055, 0x0, 0x2); // Set GPIO #9 low
+ writeGBTReg(ohN, gbtN, 0x055, 0x1, 0x2); // Set GPIO #9 high
} catch (const gbt_ic_error&) {
gbtMask &= ~(1U << gbtN);
}
--
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