Clock reset order seems wrong

Description

Until now (i.e. before and after !268 (merged)), the clocks are reset in the following order:

1. TTC MMCM
2. MGT CPLL and QPLL

Considering that the TTC MMCM is driven with the output of an MGT CPLL or QPLL (jitter cleaned clock), it would seem more correct to perform the resets in the opposite order:

1. MGT CPLL and QPLL
2. TTC MMCM

As with all clocking changes, great care must be taken in the reliability and the side effects of the change.

Possible fixes

Reset the MGT CPLL and QPLL first, followed by a full TTC MMCM reset, including the TTC phase alignment procedure.