Commit b24761b1 authored by Javier Serrano's avatar Javier Serrano Committed by Dimitris Lampridis
Browse files

Going from vectors to points in the waveforms for setpoints and feedforward.


git-svn-id: https://www.ohwr.org/svn/lrfsc/trunk@11 6473569e-ccbe-4206-bb48-f381304e9851
parent 96c34da2
......@@ -670,11 +670,11 @@ begin
antiWindUp <= not registers(CONTROLR)(2);
-- VHDL date registers: 6 July 2011
-- VHDL date registers: 8 July 2011
-- Format is "seconds since 1 Jan 1970"
-- such as provided by 'date +%s | wcalc -h' under Linux
registers(VHDLVERHR) <= X"4e14";
registers(VHDLVERLR) <= X"1e77";
registers(VHDLVERHR) <= X"4e17";
registers(VHDLVERLR) <= X"287b";
RAM1Addr <= ram1AddrAux;
RAM1OEN <= ram1OEAux;
......
......@@ -41,8 +41,8 @@ signal rmPendingAddr: std_logic_vector(17 downto 0);
signal rmPendingData: std_logic_vector(15 downto 0);
signal rmPendingWrite, rmPendingRead: std_logic;
signal ramAddrAux: unsigned(17 downto 0);
signal spCounter: unsigned(4 downto 0);
signal iAuxH, iAuxL, qAuxH, qAuxL: std_logic_vector(15 downto 0);
signal spCounter: unsigned(5 downto 0);
signal iAuxH, iAuxL, qAuxH, qAuxL, iAux, qAux: std_logic_vector(15 downto 0);
signal iAuxn, qAuxn: signed(29 downto 0);
signal iCurrent, qCurrent: signed(29 downto 0);
signal bigStepI, bigStepQ: signed(29 downto 0);
......@@ -62,26 +62,26 @@ RAMAddress <= std_logic_vector(ramAddrAux);
-- Big steps divided by 32
smallStepI <= bigStepI(29) & bigStepI(29) & bigStepI(29) &
bigStepI(29) & bigStepI(29) & bigStepI(29 downto 5);
smallStepQ <= bigStepQ(29) & bigStepQ(29) & bigStepQ(29) &
bigStepQ(29) & bigStepQ(29) & bigStepQ(29 downto 5);
--smallStepI <= bigStepI(29) & bigStepI(29) & bigStepI(29) &
-- bigStepI(29) & bigStepI(29) & bigStepI(29 downto 5);
--smallStepQ <= bigStepQ(29) & bigStepQ(29) & bigStepQ(29) &
-- bigStepQ(29) & bigStepQ(29) & bigStepQ(29 downto 5);
incProcess: process(Clk40)
begin
if Clk40'event and Clk40='1' then
if spCounter=to_unsigned(31, spCounter'length) then
incrementI <= (others=>'0');
incrementQ <= (others=>'0');
else
incrementI <= incrementI + smallStepI;
incrementQ <= incrementQ + smallStepQ;
end if;
end if;
end process incProcess;
--incProcess: process(Clk40)
--begin
-- if Clk40'event and Clk40='1' then
-- if spCounter=to_unsigned(31, spCounter'length) then
-- incrementI <= (others=>'0');
-- incrementQ <= (others=>'0');
-- else
-- incrementI <= incrementI + smallStepI;
-- incrementQ <= incrementQ + smallStepQ;
-- end if;
-- end if;
--end process incProcess;
IDataToProcess <= std_logic_vector(iOutAux(29) & iOutAux(29) & iOutAux(29 downto 16));
QDataToProcess <= std_logic_vector(qOutAux(29) & qOutAux(29) & qOutAux(29 downto 16));
--IDataToProcess <= std_logic_vector(iOutAux(29) & iOutAux(29) & iOutAux(29 downto 16));
--QDataToProcess <= std_logic_vector(qOutAux(29) & qOutAux(29) & qOutAux(29 downto 16));
PendingRM: process(Clk40)
......@@ -118,7 +118,7 @@ end process clockCycle;
CounterProcess: process(Clk40)
begin
if Clk40'event and Clk40='1' then
if RFONRising = '1' then
if RFONRising = '1' or spCounter=to_unsigned(32, spCounter'length) then
spCounter <= (others=>'0');
else
spCounter <= spCounter + 1;
......@@ -196,6 +196,10 @@ begin
qAuxH <= (others=>'0');
qAuxL <= (others=>'0');
nextAddr <= (others=>'0');
iAux <= (others=>'0');
qAux <= (others=>'0');
IDataToProcess <= (others=>'0');
QDataToProcess <= (others=>'0');
if configMode='0' and RFONRising='1' then
RAMOE <= '0';
RAMCS <= '0';
......@@ -231,37 +235,51 @@ begin
DataToProcessValid <= '1';
iOutAux <= iCurrent + incrementI;
qOutAux <= qCurrent + incrementQ;
if xn=to_unsigned(0, xn'length) then
-- if xn=to_unsigned(0, xn'length) then
if
(spCounter=to_unsigned(4, spCounter'length) or
spCounter=to_unsigned(8, spCounter'length) or
spCounter=to_unsigned(12, spCounter'length) or
spCounter=to_unsigned(16, spCounter'length) or
spCounter=to_unsigned(22, spCounter'length)) then
spCounter=to_unsigned(22, spCounter'length) or
spCounter=to_unsigned(26, spCounter'length)) then
ramAddrAux <= (unsigned(presCycleAux)) & (resize(unsigned(ramAddrAux + 1),13));
elsif spCounter=to_unsigned(26, spCounter'length) then
ramAddrAux <= unsigned(presCycleAux & nextAddr);
--elsif spCounter=to_unsigned(26, spCounter'length) then
--ramAddrAux <= unsigned(presCycleAux & nextAddr);
end if;
end if;
-- end if;
if xn=to_unsigned(0, xn'length) and spCounter=to_unsigned(6, spCounter'length) then
nextAddr <= ramDataInC(12 downto 0);
if spCounter=to_unsigned(6, spCounter'length) then
iAux <= ramDataInC;
end if;
if xn=to_unsigned(0, xn'length) and spCounter=to_unsigned(10, spCounter'length) then
xnAux <= unsigned(ramDataInC);
if spCounter=to_unsigned(10, spCounter'length) then
IDataToProcess <= iAux;
QDataToProcess <= ramDataInC;
end if;
if xn=to_unsigned(0, xn'length) and spCounter=to_unsigned(14, spCounter'length) then
iAuxH <= ramDataInC;
if spCounter=to_unsigned(14, spCounter'length) then
iAux <= ramDataInC;
end if;
if xn=to_unsigned(0, xn'length) and spCounter=to_unsigned(18, spCounter'length) then
iAuxL <= ramDataInC;
if spCounter=to_unsigned(18, spCounter'length) then
qAux <= ramDataInC;
end if;
if xn=to_unsigned(0, xn'length) and spCounter=to_unsigned(24, spCounter'length) then
qAuxH <= ramDataInC;
if spCounter=to_unsigned(21, spCounter'length) then
IDataToProcess <= iAux;
QDataToProcess <= qAux;
end if;
if spCounter=to_unsigned(24, spCounter'length) then
iAux <= ramDataInC;
end if;
if xn=to_unsigned(0, xn'length) and spCounter=to_unsigned(28, spCounter'length) then
qAuxL <= ramDataInC;
if spCounter=to_unsigned(28, spCounter'length) then
qAux <= ramDataInC;
end if;
if spCounter=to_unsigned(32, spCounter'length) then
IDataToProcess <= iAux;
QDataToProcess <= qAux;
end if;
if spCounter=to_unsigned(31, spCounter'length) then
if xn=to_unsigned(0, xn'length) then
......
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