AddrDecoderWbApp.v 4.46 KB
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`timescale 1ns/100ps

module AddrDecoderWBApp( 
    input   Clk_ik,
    input   [20:0] Adr_ib21,
    input   Stb_i,
    output  reg [31:0] Dat_ob32,
    output  reg Ack_o,

    input   [31:0] DatI2cPllRef_ib32,
    input   AckI2cPllRef_i,
    output  reg StbI2cPllRef_o,

    input   [31:0] DatAppReleaseId_ib32,
    input   AckAppReleaseId_i,
    output  reg StbAppReleaseId_o,
    
    input   [31:0] DatPeriodCounter_ib32,
    input   AckPeriodCounter_i,
    output  reg StbPeriodCounter_o,
    
    input   [31:0] DatSpiMaster_ib32,
    input   AckSpiMaster_i,
    output  reg StbSpiMaster_o,

    input   [31:0] DatFmcTest_ib32,
    input   AckFmcTest_i,
    output  reg StbFmcTest_o,
    
    input   [31:0] DatMgtTest_ib32,
    input   AckMgtTest_i,
    output  reg StbMgtTest_o,
    
    input   [31:0] DatGpIoControl_ib32,
    input   AckGpIoControl_i,
    output  reg StbGpIoControl_o    
    
 ); 

localparam dly = 1;

reg [7:0] SelectedModule_b8;

localparam  c_SelNothing        = 8'h0,
            c_SelI2cPllRef      = 8'd1,   
            c_SelPeriodCounter  = 8'd2,      
            c_SelSpiMaster      = 8'd3,
            c_SelFmcTest        = 8'd4,            
            c_SelMgtTest        = 8'd5,
            c_SelGpIoControl    = 8'd6,
            c_SelAppRevisionId  = 8'd7; 
            

always @* 
    casez(Adr_ib21)
        21'b0_0000_0000_0000_0000_00??: SelectedModule_b8 = c_SelAppRevisionId;     // FROM 00_0000 TO 00_0003 (WB) == FROM 00_0000 TO 00_000C (VME) <-   4 regs ( 16B)
        21'b0_0000_0000_0000_0000_01??: SelectedModule_b8 = c_SelPeriodCounter;     // FROM 00_0004 TO 00_0007 (WB) == FROM 00_0010 TO 00_001C (VME) <-   4 regs ( 16B)    
        21'b0_0000_0000_0000_0000_1???: SelectedModule_b8 = c_SelSpiMaster;         // FROM 00_0008 TO 00_000F (WB) == FROM 00_0020 TO 00_003C (VME) <-   8 regs ( 32B)
        21'b0_0000_0000_0000_0001_00??: SelectedModule_b8 = c_SelGpIoControl;       // FROM 00_0010 TO 00_0013 (WB) == FROM 00_0040 TO 00_004C (VME) <-  4 regs ( 16B)
        21'b0_0000_0000_0000_0001_01??: SelectedModule_b8 = c_SelI2cPllRef;         // FROM 00_0014 TO 00_0017 (WB) == FROM 00_0050 TO 00_005C (VME) <-   4 regs ( 16B)
        21'b0_0000_0000_0000_001?_????: SelectedModule_b8 = c_SelFmcTest;           // FROM 00_0020 TO 00_003F (WB) == FROM 00_0080 TO 00_00FC (VME) <-  32 regs (128B)
        21'b0_0000_0000_0000_1???_????: SelectedModule_b8 = c_SelMgtTest;           // FROM 00_0080 TO 00_00FF (WB) == FROM 00_0200 TO 00_03FC (VME) <- 128 regs (512B)
        default: SelectedModule_b8 = c_SelNothing;
    endcase     
            
            
always @(posedge Clk_ik) begin
    Ack_o                   <= #dly 1'b0;
    Dat_ob32                <= #dly 32'h0;
    StbI2cPllRef_o          <= #dly 1'b0;
    StbPeriodCounter_o      <= #dly 1'b0;
    StbSpiMaster_o          <= #dly 1'b0;
    StbMgtTest_o            <= #dly 1'b0;
    StbFmcTest_o            <= #dly 1'b0;
    StbGpIoControl_o        <= #dly 1'b0;
    StbAppReleaseId_o        <= #dly 1'b0;
    case(SelectedModule_b8) 
        c_SelAppRevisionId: begin
            StbAppReleaseId_o  <= #dly  Stb_i;
            Dat_ob32        <= #dly  DatAppReleaseId_ib32;
            Ack_o           <= #dly  AckAppReleaseId_i;
        end
        c_SelI2cPllRef: begin
            StbI2cPllRef_o  <= #dly  Stb_i;
            Dat_ob32        <= #dly  DatI2cPllRef_ib32;
            Ack_o           <= #dly  AckI2cPllRef_i;
        end        
        c_SelPeriodCounter: begin
            StbPeriodCounter_o <= #dly  Stb_i;
            Dat_ob32           <= #dly  DatPeriodCounter_ib32;
            Ack_o              <= #dly  AckPeriodCounter_i;        
        end
        c_SelSpiMaster: begin
            StbSpiMaster_o  <= #dly  Stb_i;
            Dat_ob32        <= #dly  DatSpiMaster_ib32;
            Ack_o           <= #dly  AckSpiMaster_i;        
        end
        c_SelFmcTest: begin
            StbFmcTest_o    <= #dly  Stb_i;
            Dat_ob32        <= #dly  DatFmcTest_ib32;
            Ack_o           <= #dly  AckFmcTest_i;        
        end
        c_SelMgtTest: begin
            StbMgtTest_o    <= #dly  Stb_i;
            Dat_ob32        <= #dly  DatMgtTest_ib32;
            Ack_o           <= #dly  AckMgtTest_i;        
        end
        c_SelGpIoControl: begin
            StbGpIoControl_o    <= #dly  Stb_i;
            Dat_ob32        <= #dly  DatGpIoControl_ib32;
            Ack_o           <= #dly  AckGpIoControl_i;        
        end        
        
    endcase
end        

endmodule