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Dimitris Lampridis authored
[WR-dev]: Remove 100MHz clock from default sys_pll, the PHY reconf module of the ArriaV can work with 125MHz as well. Also fix timing constraints after renaming of module instantiations
bd040521
[WR-dev]: Remove 100MHz clock from default sys_pll, the PHY reconf module of the ArriaV can work with 125MHz as well. Also fix timing constraints after renaming of module instantiations