Commit 301b79a0 authored by Dimitris Lampridis's avatar Dimitris Lampridis
Browse files

[WR-dev] Remove I2cWrProm, rewire the dedicated EEPROM to the WR PTP core

parent ff59f05a
......@@ -23,10 +23,6 @@ module AddrDecoderWbSys(
input AckI2cIoExpAndMux_i,
output reg StbI2cIoExpAndMux_o,
input [31:0] DatI2cWrProm_ib32,
input AckI2cWrProm_i,
output reg StbI2cWrProm_o,
input [31:0] DatAppSlaveBus_ib32,
input AckAppSlaveBus_i,
output reg StbAppSlaveBus_o,
......@@ -44,17 +40,15 @@ localparam c_SelNothing = 8'h0,
c_SelIntManager = 8'd1,
c_SelIoExpAndMux = 8'd2,
c_SelUniqueIdReader = 8'd3,
c_SelI2cWrProm = 8'd4,
c_SelWrPtpCore = 8'd4,
c_SelSpiMaster = 8'd5,
c_SelAppSlaveBus = 8'd6,
c_SelWrPtpCore = 8'd7;
c_SelAppSlaveBus = 8'd6;
always @*
casez(Adr_ib22)
22'b00000000000000000000??: SelectedModule_b8 = c_SelIntManager; // FROM 00_0000 TO 00_0003 (WB) == FROM 00_0000 TO 00_000C (VME) <- 4 regs (16B)
22'b00000000000000000001??: SelectedModule_b8 = c_SelIoExpAndMux; // FROM 00_0004 TO 00_0007 (WB) == FROM 00_0010 TO 00_001C (VME) <- 4 regs (16B)
22'b00000000000000000010??: SelectedModule_b8 = c_SelUniqueIdReader; // FROM 00_0008 TO 00_000B (WB) == FROM 00_0020 TO 00_002C (VME) <- 4 regs (16B)
22'b00000000000000000011??: SelectedModule_b8 = c_SelI2cWrProm; // FROM 00_000C TO 00_000F (WB) == FROM 00_0030 TO 00_003C (VME) <- 4 regs (16B)
22'b0000000000000000010???: SelectedModule_b8 = c_SelSpiMaster; // FROM 00_0010 TO 00_0017 (WB) == FROM 00_0040 TO 00_005C (VME) <- 8 regs (32B)
22'b000001????????????????: SelectedModule_b8 = c_SelWrPtpCore; // FROM 01_0000 TO 01_FFFF (WB) == FROM 04_0000 TO 07_FFFC (VME)
22'b1?????????????????????: SelectedModule_b8 = c_SelAppSlaveBus; // FROM 20_0000 TO 3F_FFFF (WB) == FROM 80_0000 TO FF_FFFC (VME) <- 2M regs (8MB)
......@@ -69,7 +63,6 @@ always @* begin
StbUniqueIdReader_o <= #dly 1'b0;
StbAppSlaveBus_o <= #dly 1'b0;
StbI2cIoExpAndMux_o <= #dly 1'b0;
StbI2cWrProm_o <= #dly 1'b0;
StbWrpcSlaveBus_o <= #dly 1'b0;
case (SelectedModule_b8)
c_SelIntManager: begin
......@@ -87,11 +80,6 @@ always @* begin
Dat_ob32 <= #dly DatUniqueIdReader_ib32;
Ack_o <= #dly AckUniqueIdReader_i;
end
c_SelI2cWrProm: begin
StbI2cWrProm_o <= # dly Stb_i;
Dat_ob32 <= #dly DatI2cWrProm_ib32;
Ack_o <= #dly AckI2cWrProm_i;
end
c_SelSpiMaster: begin
StbSpiMaster_o <= #dly Stb_i;
Dat_ob32 <= #dly DatSpiMaster_ib32;
......
......@@ -158,8 +158,6 @@ reg [ 1:0] WbMasterStb_xd2;
reg [ 1:0] WbAckAppSlaveBus_xd2;
wire [ 4:0] VmeGa_b5; // Comment: Need to be accessed from the I2C exp
wire VmeGap_n; // Comment: Need to be accessed from the I2C exp
wire WbAckI2cWrProm, WbStbI2cWrProm;
wire [31:0] WbDatI2cWrProm_b32;
//reg Reset_rq;
wire WbStbWrpcSlaveBus;
wire [31:0] WbDatWrpcSlaveBus_b32;
......@@ -276,10 +274,6 @@ AddrDecoderWbSys i_AddrDecoderWbSys (
.AckI2cIoExpAndMux_i (WbAckI2cIoExpAndMux),
.StbI2cIoExpAndMux_o (WbStbI2cIoExpAndMux),
//---
.DatI2cWrProm_ib32 (WbDatI2cWrProm_b32),
.AckI2cWrProm_i (WbAckI2cWrProm),
.StbI2cWrProm_o (WbStbI2cWrProm),
//---
.DatWrpcSlaveBus_ib32 (WbDatWrpcSlaveBus_b32),
.AckWrpcSlaveBus_i (WbAckWrpcSlaveBus),
.StbWrpcSlaveBus_o (WbStbWrpcSlaveBus));
......@@ -410,25 +404,6 @@ i_I2cIoExpAndMux (
.Scl_ioz (I2cMuxScl_ok),
.Sda_ioz (I2cMuxSda_io));
//****************************
//IO EXP and MUX
//****************************
I2cMasterWb #(
.g_CycleLenght (10'd256))
i_I2cWrProm (
.Clk_ik (Clk_k),
.Rst_irq (Reset_rq),
.Cyc_i (WbCyc),
.Stb_i (WbStbI2cWrProm),
.We_i (WbWe),
.Adr_ib2 (WbAdr_b22[1:0]),
.Dat_ib32 (WbDatMoSi_b32),
.Dat_oab32 (WbDatI2cWrProm_b32),
.Ack_oa (WbAckI2cWrProm),
.Scl_ioz (WrPromScl_ok),
.Sda_ioz (WrPromSda_io));
//*****************************
//WR PTP core Wrapper for VFCHD
//*****************************
......@@ -437,7 +412,7 @@ i_I2cWrProm (
(
.clk_board_125m_i (GbitTrxClkRefR_ik),
.clk_board_20m_i (Clk20VCOx_ik),
.aresetn_i (VmeSysReset_irn),
.areset_n_i (VmeSysReset_irn),
.clk_sys_62m5_o (Clk_k),
.clk_ref_125m_o (),
.rst_sys_62m5_o (Reset_rq),
......@@ -447,6 +422,8 @@ i_I2cWrProm (
.dac_sclk_o (PllDacSclk_ok),
.sfp_tx_o (EthSfpTx_o),
.sfp_rx_i (EthSfpRx_i),
.eeprom_sda_b (WrPromSda_io),
.eeprom_scl_o (WrPromScl_ok),
.wb_adr_i (WbAdr_b32),
.wb_dat_i (WbDatMoSi_b32),
.wb_dat_o (WbDatWrpcSlaveBus_b32),
......
wr-cores @ c7e7ea62
Subproject commit 26aa8326de03fe38ea9b7a6be34cb10923aaba55
Subproject commit c7e7ea62a9daa27b57f6fc97ccaacbc0233501cb
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