Added the module for the arbitration of the I2C expanders and muxes

Hdl/FpgaModules/SystemSpecific/I2cMuxAndExpMaster.v

@@ -32,6 +32,7 @@ module I2cExpAndMuxMaster
     //==== Clocks & Resets ====\\ 
     input             Clk_ik,
     input             Rst_irq,
+    //==== Access requests ====\\
     // IO Expanders parameters:
     input             IoExpWrReq_i,    
     output reg        IoExpWrOn_oq,
@@ -50,7 +51,7 @@ module I2cExpAndMuxMaster
     input       [6:0] I2cSlaveAddr_ib7,
     input       [7:0] I2cSlaveRegAddr_ib8,
     input       [7:0] I2cSlaveByte_ib8,   
-    //==== Status and Results====\\ 
+    // Status and results: 
     output reg        Busy_o,
     output reg        NewByteRead_op,
     output reg  [7:0] ByteOut_ob8,