Improve GBTx IC transactions error reporting

This is a follow-up to the discussion with @jcarlson on !76 (merged). The initial goal was to understand the behavior of the register writes and the robustness of the register reads. The current implementation behaves like this:

• The write transaction status is still ignored (i.e. all transactions succeed).
• The READ_DATA register is updated every time a valid frame is seen (after a read or write transaction, but also some garbage on the link).

For the solution proposed in !76 (comment 5195810) (exposing the parity value of the last frame), my concern would be that we cannot ensure that the parity register and the data register will be read atomically. For the solution proposed in !76 (comment 5197552) (triggering a bus error for invalid received frames), my concern would be that the behavior would be quite different from the other registers, without significant improvement with respect to the first solution.

Instead, I would propose the following. It is along the lines of asynchronous SCA transactions (it has been discussed for quite some time now, but never implemented).

This interface is kept very close to what exists now. The registers GBTX_LINK_SELECT, GBT_VERSION, GBTX_I2C_ADDR, ADDRESS, READ_WRITE_LENGTH, WRITE_DATA, EXECUTE_WRITE, EXECUTE_READ are not to be modified. However, the read/status registers would be enhanced.

• REQUEST_STATUS:
  • DONE : reset when a transaction is triggered (write to EXECUTE_WRITE or EXCEUTE_READ); set once the transaction completes (frame received, with or without error, or timeout)
  • ERROR : set if the last transaction was an error
  • TIMEOUT : set if the last transaction error was a timeout (to de be defined)
  • More error codes can be envisionned
• READ_DATA : valid only when (DONE == 1) && (ERROR == 0)

(i.e. the data is latched for the first frame received after writing to EXECUTE_WRITE or EXCEUTE_READ)

It is understood that the RX module checks exhaustively the received frame (matching I2C address, address, length, direction, correct parity,...) Any detected error should be echoed in the ERROR register. It is the responsibility of the software to keep the register values constant until the transaction is done (trivial to do, at least in cmsgemos).

What do you think @jcarlson, @apeck, @evka? I think it shouldn't be very difficult to implement.