Explore projects
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Update Vivado version used developing phase-1 firmware to 2020.1 .
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HPTD / tx_phase_aligner
CERN Open Hardware Licence Version 2 - Weakly ReciprocalTransmitter phase aligner for Xilinx transceivers
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Backup repository to store code while waiting to solve Gitlab problems with atlas-pc-trig-00
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Pedro Vicente Leitao / tmrg
GNU General Public License v2.0 or laterTriple Modular Redundancy Generator
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Risto Pejasinovic / tmrg
GNU General Public License v2.0 or laterTriple Modular Redundancy Generator
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HPTD / tclink
CERN Open Hardware Licence Version 2 - Weakly ReciprocalTiming Compensated Link
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Jeroen Hegeman / tclink
CERN Open Hardware Licence Version 2 - Weakly ReciprocalTiming Compensated Link
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Jonathan Fulcher / tclink
CERN Open Hardware Licence Version 2 - Weakly ReciprocalTiming Compensated Link
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Old copy of https://ohwr.org/project/svec. That git repository has been rewritten to remove all PCB stuff (it is on EDMS) and to add HDL and software
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Ales Svetek / surf
Lawrence Berkeley National Labs BSD variant licenseSLAC Ultimate RTL Framework
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Antonio Bergnoli / surf
Lawrence Berkeley National Labs BSD variant licenseA huge VHDL library for FPGA development
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