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Tower Builder model in System Verilog for integration into VHDL

Peary Caribou DAQ firmware

The BTrain-over-WhiteRabbit project provides a set of IP cores that implement a transport layer to be used for transmission of BTrain-related information over WR network. See project wiki

A huge VHDL library for FPGA development

DAQ and test system for the RD53 readout chips

This is a project with the documentation, firmware and software for the ATLAS Tile Calorimeter read-out link and control board, namely the DaughterBoard.

This is the home for the MightyPix DAQ framework development.

Sources, scripts and generated ip-cores. https://github.com/fpgasystems/davos https://github.com/fpgasystems/fpga-network-stack/

Update Vivado version used developing phase-1 firmware to 2020.1 .

Peary Caribou DAQ firmware

Firmware development for TileCal Daughterboard revision 6

Triple Modular Redundancy Generator