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HDL on Git

PS DDR diagnostic test

Timing Compensated Link

One Repository to rule them all

Getting started with Vivado and PetaLinux with Zynq EBAZ4205 Board

Simple project to control Kria Zynq UltraScale+ MPSoC on KV260 development board via AXI interface in Linux User Space using minimal software in Python and C++.

DAQ and test system for the RD53 readout chips