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miniDAQ for ATLAS Muon NSW sTGC Trigger Path

VFC-HD based backend for the MCOI

DAQ and test system for the RD53 readout chips

Open Source VHDL Verification Component Framework for making structured VHDL testbenches for verification of FPGA and ASIC.

Wrapper code to integrate the particle flow HLS code into mp7fw.

Fork of the ib_flit_sim project by Mellanox

Firmware used for the readout and configuration of the VMM ASIC, a special chip tailored for the needs of ATLAS NSW upgrade.

Code repository for the MCH upgrade electronics including SOLAR/CRU/GRORC

CMS HGCROC chip common testbench FW repo

uROS firmware

Petalinux configuration and binaries for the reference implementation of the White Rabbit PTP Core (https://www.ohwr.org/projects/wr-cores/wiki/Wrpc_core)

Simulation of a pixel at the edge of an ATLAS IBL Sensor. Long pixel + Guard Ring structure. The process simulation can produce a 2D or 3D model using the same GDS file and process description in sprocess.

ICWB is use to process the GDS mask file

DAQ and test system for the RD53A readout chip

Project containing design files for my experimentation with the GBT link

DAQ and test system for the RD53A readout chip

[FS] FELIX Firmware

Firmware dedicated to the communication with the GBTx ASIC