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Firmware dedicated to the communication with the GBTx ASIC
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This repository contains schemes, digital design and documentation of the new MCOI platform, which using Enclustra XU5 module with FPGA ZYNQ (XCZU4EV-SFVC784)
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Code example for my GSI job interview
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Basic pin-out build to check pin-planning and ADC clocking structures
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HDLC for GBT-SCA communication part of DCS work in CRU project.
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This project contains Si5341 internal PLL programming for 240 MHz generation on Reflex Arria10 Board
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GBT-FPGA Implementation on a Xilinx VC709 Evaluation Board
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ADC readout firmware source for KC705 by using I2C and SiTCP.
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