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For testing the frequency of Arria 10 Development board

Arria10 FPGA Temperature Measurement

DAQ and test system for the RD53A readout chip

DAQ and test system for the RD53 readout chips

CMS HGCROC chip common testbench FW repo

HDLC for GBT-SCA communication part of DCS work in CRU project.

A framework for fast simulation of a generic collider experiment

Project based on UQDS v2.x to test the new DQQDIDT board.

Demonstration on how a DSP block instantiated as System Generator model is simulated differently in System Generator than (once exported as an IP Core) in Vivado

Minimal public example

This component can able to log inside FPGA frequency value, with accuracy upto 2 decimal digits. (Value Format : XXX.XX00)

GBT Word clk to frame clk for 6 links