Control flow not respected after empty node

Originally noticed here: https://its.cern.ch/jira/browse/ATR-21725, investigated further here: https://its.cern.ch/jira/browse/ATR-21824

A particular structure of sequential control flow nodes can result in two sequential algorithms being scheduled concurrently. This is the scheduler VERBOSE output from my attached job options:

RootDecisionHub (0), w/ decision: UNDEFINED(-1)
  topSeq (1), w/ decision: UNDEFINED(-1)
    A1 (2), w/ decision: TRUE(1), in state: EVTACCEPTED
    midSeq (3), w/ decision: FALSE(0)
      A2 (4), w/ decision: TRUE(1), in state: EVTACCEPTED
      lowSeq (5), w/ decision: FALSE(0)
      A3 (6), w/ decision: UNDEFINED(-1), in state: SCHEDULED
    A4 (7), w/ decision: UNDEFINED(-1), in state: SCHEDULED

Note that A3 and A4 are both SCHEDULED, despite the fact that topSeq and midSeq are configured for serial execution.

This does not occur if lowSeq contains an algorithm, regardless of whether it returns EVTACCEPTED or EVTREJECTED. The problem also does not occur if lowSeq is removed completely, or if midSeq is removed and its contents flattened into topSeq.

It is specific to the default FALSE decision of a sequence with ModeOR=True. Setting lowSeq to be ModeOR=False will return a default TRUE decision, leading to the expected sequential execution of the algorithms.

It seems then that the default Supervisor resolution of lowSeq can cause the visitor to continue executing within midSeq (which should short-circuit) as well as returning from midSeq to topSeq. Since topSeq is ModeOR=True and ShortCircuit=False, alg A4 is scheduled even after a FALSE decision from midSeq - this is the needed behaviour.

CFBugWithEmptyNode.py