lpgbt-fpga-kcu105 tagshttps://gitlab.cern.ch/gbt-fpga/lpgbt-fpga-kcu105/-/tags2020-10-12T22:31:46+02:00https://gitlab.cern.ch/gbt-fpga/lpgbt-fpga-kcu105/-/tags/v.2.2v.2.2ebrandaohttps://gitlab.cern.ch/gbt-fpga/lpgbt-fpga-kcu105/-/tags/v.2.1v.2.1Introducing a fixed-latency design, clock-domain-crossing examples for users and modifications in the documentation.<p data-sourcepos="1:1-1:61" dir="auto">Example design for KCU105 using lpGBT-FPGA core version 2.1.0</p>2020-10-12T22:31:46+02:00ebrandao