IC Rx FIFO control

Dear developers,

This is more about asking a question than reporting an issue.

I would like to retrieve every word of the IC reply frame after sending an lpGBT read/write request but I am a bit confused about how to interface the Rx FIFO. So here are a couple of questions :

• How to be sure that I am not reading the fifo faster than the deserializer is writing to it (which could lead to an early assertion of the FIFO empty_o that I use to make sure I read all FIFO words) ? Shall I wait for the FIFO to be completely full ?

• How many clock cycles does the ic_deserializer need to completely fill the Rx FIFO ?

• In order to retrieve every word, how many clock cycles do I need to leave between two consecutive FIFO read_i assertions ?

• Are the SOF and EOF delimiters also pushed to the FIFO ?

PS : (my retrieving process runs at 40MHz)

Please indulge my lack of expertise.

Many thanks in advance,

Younes