Commit 6a1b166e authored by Irene Mateos Dominguez's avatar Irene Mateos Dominguez
Browse files

Checking the BE phase alignment during the CIC IN test

parent a3649799
......@@ -931,7 +931,7 @@ bool CicInterface::CheckPhaseAlignerLock(Chip* pChip, uint8_t pCheckValue)
cRegItem.fAddress = cRegBaseAddress + cIndex;
cRegItem.fStatusReg = 0x01;
auto cRegValue = fBoardFW->SingleRegisterRead(pChip, cRegItem);
LOG(DEBUG) << BOLDBLUE << "Lock on input " << cIndex << " -- " << std::bitset<8>(cRegValue) << RESET;
LOG(INFO) << BOLDBLUE << "Lock on input " << cIndex << " -- " << std::bitset<8>(cRegValue) << RESET;
for(size_t cBitIndex = 0; cBitIndex < 8; cBitIndex++)
{
......
......@@ -506,7 +506,7 @@ std::pair<bool, uint8_t> LinkAlignmentOT::PhaseTuneLine(const Chip* pChip, uint8
{
LOG(INFO) << BOLDRED << "Could not phase align-BE data for BeBoard#" << +cBoardId << " Board#" << +pChip->getBeBoardId() << " Hybrid#" << +pChip->getHybridId() << " Chip#" << +pChip->getId()
<< " line# " << +pLineId << RESET;
throw std::runtime_error(std::string("Could not phase align-BE data in LinkAlignmentOT..."));
//throw std::runtime_error(std::string("Could not phase align-BE data in LinkAlignmentOT..."));
}
cLineStatus.second = cAlignerInterface->GetLineConfiguration().fDelay;
......@@ -543,7 +543,7 @@ std::pair<bool, uint8_t> LinkAlignmentOT::WordAlignLine(const Chip* pChip, uint8
{
LOG(INFO) << BOLDRED << "Could not word align-BE data for BeBoard#" << +cBoardId << " Board#" << +pChip->getBeBoardId() << " Hybrid#" << +pChip->getHybridId() << " Chip#" << +pChip->getId()
<< " line# " << +pLineId << RESET;
throw std::runtime_error(std::string("Could not word align-BE data in LinkAlignmentOT..."));
//throw std::runtime_error(std::string("Could not word align-BE data in LinkAlignmentOT..."));
}
// check if I allow a bit-slip of 0
if(cLineStatus.second == 0 && !fAllowZeroBitslip)
......@@ -673,7 +673,7 @@ bool LinkAlignmentOT::LineTuning(const Chip* pChip, uint8_t pLineId, uint8_t pAl
cWordAlignmentStatus = WordAlignLine(pChip, pLineId, pAlignmentPattern, pPeriod);
cSuccess = cWordAlignmentStatus.first && cSuccess;
LOG(DEBUG) << BOLDBLUE << "Automated phase tuning attempt" << cAttempts << " : " << ((cSuccess) ? "Worked" : "Failed") << RESET;
LOG(INFO) << BOLDBLUE << "Automated phase tuning attempt" << cAttempts << " : " << ((cSuccess) ? "Worked" : "Failed") << RESET;
cAttempts++;
} while(!cSuccess && cAttempts < 10);
......
......@@ -325,16 +325,16 @@ void PSHybridTester::MPATest(BeBoard* pBoard)
#if defined(__USE_ROOT__)
uint32_t cTestPatterns[4] = {0xAA, 0xCC, 0x00, 0xFF};
// String with the binary representation of the pattern
// int cTotalBadLines = 0; // Number of bad CIC in lines
std::string cParameter[4] = {"", "", "", ""}; // Placeholder for the name of the summaryTree parameter name
std::string cValue[4] = {"", "", "", ""};
int cTotalBadLines = 0; // Number of bad CIC in lines
std::string cParameter[4] = {"", "", "", ""}; // Placeholder for the name of the summaryTree parameter name
std::string cValue[4] = {"", "", "", ""};
DPInterface cDPInterfacer;
DPInterface cDPInterfacer;
// BeBoardFWInterface* cInterface = dynamic_cast<BeBoardFWInterface*>(this->fBeBoardFWMap.find(0)->second);
// bool cRun = true;
// uint8_t cRuns = 0;
// uint8_t cMaxRuns = 1;
bool cRun = true;
uint8_t cRuns = 0;
uint8_t cMaxRuns = 1;
TTree* CICinTree[4];
......@@ -395,22 +395,66 @@ void PSHybridTester::MPATest(BeBoard* pBoard)
cDPInterfacer.Configure(cInterface, 0xEA);
cDPInterfacer.Start(cInterface);
std::this_thread::sleep_for(std::chrono::milliseconds(1));
bool cAlignmentStatus = true;
for(auto cOpticalGroup: *pBoard)
{
for(auto cHybrid: *cOpticalGroup)
{
for(auto cChip: *cHybrid) //define CIC with ID 0 and tune only for it.
for (auto cChip: *cHybrid)
{
if( cChip->getFrontEndType() != FrontEndType::CIC2 ) { continue; }
for(uint8_t cLineId = 1; cLineId < 5; cLineId++)
if(cChip->getId() != 0) continue;
//auto& cCic = static_cast<OuterTrackerHybrid*>(cHybrid)->fCic;
LOG(INFO) << "Tuning lines for PhyPort " << +cPhyPort << RESET;
cAlignmentStatus = true;
bool cFirstRun = true;
do
{
LOG(INFO) << "Tuning line " << +cLineId << "for PhyPort " << +cPhyPort;
PhaseTuneLine(cChip, cLineId);
for(uint8_t cLineId = 1; cLineId < 5; cLineId++)
{
//auto cPhaseTuneLineOutput = PhaseTuneLine(cCic, cLineId);
//cAlignmentStatus = cPhaseTuneLineOutput.first;
//if (cAlignmentStatus) {
// LOG(INFO) << "Phase Alignment of Line#" << +cLineId << " is " << BOLDGREEN << "GOOD" << RESET;
//}
//else
//{
// LOG(INFO) << "Phase Alignment of Line#" << +cLineId << " is " << BOLDRED << "BAD" << RESET;
//}
//auto cPhaseTuneLineOutput = WordAlignLine(cChip, cLineId, 0xEA, 8);
//cAlignmentStatus &= cPhaseTuneLineOutput.first;
cAlignmentStatus &= LineTuning( cChip, cLineId, 0xEA, 8);
//if (cPhaseTuneLineOutput.first) {
if( cAlignmentStatus ) {
LOG(INFO) << "Phase/Word Alignment of Line#" << +cLineId << " is " << BOLDGREEN << "GOOD" << RESET;
}
else
{
LOG(INFO) << "Phase/Word Alignment of Line#" << +cLineId << " is " << BOLDRED << "BAD" << RESET;
}
}
cFirstRun = false;
}
while(!cAlignmentStatus && cFirstRun );
}
}
} // Chip
}
} // Hybrid
} // Optical group
//BackEndAlignment cBackEndAlignment;
//cBackEndAlignment.Inherit(this);
//cBackEndAlignment.Initialise();
//cAlignmentStatus = cBackEndAlignment.CICAlignment(pBoard);
if( cAlignmentStatus ) {
LOG(INFO) << "Phase/Word Alignment of PhyPort#" << +cPhyPort << RESET;
}
else
{
LOG(INFO) << "Phase/Word Alignment of PhyPort#" << +cPhyPort << RESET;
}
// D19cFWInterface::PhaseTuner pTuner;
// uint8_t cMode = 2;
......
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