Commit f77dbc65 authored by Frank Winklmeier's avatar Frank Winklmeier
Browse files

Merge branch 'jfexoutput' into 'master'

Make L1Calo jFEXOutputCollection work with read and write handles

See merge request atlas/athena!46819
parents 3fee800d b0fc79c0
......@@ -64,7 +64,7 @@ namespace LVL1 {
virtual StatusCode init(int id, int efexid) override ;
virtual StatusCode execute() override ;
virtual StatusCode execute(jFEXOutputCollection* inputOutputCollection) override ;
virtual void reset() override ;
......
......@@ -30,10 +30,7 @@ public:
StatusCode finalize ();
private:
jFEXOutputCollection* m_jFEXOutputCollection;
//std::shared_ptr m_jFEXOutputCollection;
//std::shared_ptr<jFEXOutputCollection> m_jFEXOutputCollection;
//float m_eg_nTOBs;
SG::ReadHandleKey<LVL1::jFEXOutputCollection> m_jFEXOutputCollectionSGKey {this, "MyOutputs", "jFEXOutputCollection", "MyOutputs"};
std::vector<int> m_smallRJet_eta;
std::vector<int> m_smallRJet_phi;
......@@ -96,10 +93,10 @@ private:
TTree *m_myTree;
StatusCode loadsmallRJetAlgoVariables();
StatusCode loadlargeRJetAlgoVariables();
StatusCode loadtauAlgoVariables();
StatusCode loadPileupVariables();
StatusCode loadsmallRJetAlgoVariables(SG::ReadHandle<LVL1::jFEXOutputCollection>);
StatusCode loadlargeRJetAlgoVariables(SG::ReadHandle<LVL1::jFEXOutputCollection>);
StatusCode loadtauAlgoVariables(SG::ReadHandle<LVL1::jFEXOutputCollection>);
StatusCode loadPileupVariables(SG::ReadHandle<LVL1::jFEXOutputCollection>);
};
}
#endif
......@@ -23,7 +23,7 @@ namespace LVL1 {
class jFEXOutputCollection
{
public:
jFEXOutputCollection() {};
jFEXOutputCollection();
~jFEXOutputCollection();
void clear();
void addValue_smallRJet(std::string, int);
......@@ -34,15 +34,18 @@ namespace LVL1 {
void fill_tau();
void addValue_pileup(std::string, int);
void fill_pileup();
int SRsize();
int LRsize();
int tausize();
int pileupsize();
std::unordered_map<std::string, int>* get_smallRJet(int);
std::unordered_map<std::string, int>* get_largeRJet(int);
std::unordered_map<std::string, int>* get_tau(int);
std::unordered_map<std::string, int>* get_pileup(int);
int SRsize() const;
int LRsize() const;
int tausize() const;
int pileupsize() const;
void setdooutput(bool);
bool getdooutput() const;
std::unordered_map<std::string, int>* get_smallRJet(int) const;
std::unordered_map<std::string, int>* get_largeRJet(int) const;
std::unordered_map<std::string, int>* get_tau(int) const;
std::unordered_map<std::string, int>* get_pileup(int) const;
private:
bool m_dooutput;
std::unordered_map<std::string, int> m_values_tem_smallRJet;
std::vector<std::unordered_map<std::string, int>*> m_allvalues_smallRJet;
std::unordered_map<std::string, int> m_values_tem_largeRJet;
......
......@@ -55,9 +55,9 @@ namespace LVL1 {
virtual void SetTowersAndCells_SG(int tmp [FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_wide_algoSpace_width]) override;
virtual void SetTowersAndCells_SG(int tmp [FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_thin_algoSpace_width]) override;
virtual StatusCode ExecuteForwardASide(int tmp [FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_wide_algoSpace_width]) override;
virtual StatusCode ExecuteForwardCSide(int tmp [FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_wide_algoSpace_width]) override;
virtual StatusCode ExecuteBarrel(int tmp [FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_thin_algoSpace_width]) override;
virtual StatusCode ExecuteForwardASide(int tmp [FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_wide_algoSpace_width], jFEXOutputCollection* inputOutputCollection) override;
virtual StatusCode ExecuteForwardCSide(int tmp [FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_wide_algoSpace_width], jFEXOutputCollection* inputOutputCollection) override;
virtual StatusCode ExecuteBarrel(int tmp [FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_thin_algoSpace_width], jFEXOutputCollection* inputOutputCollection) override;
virtual std::vector<std::vector<uint32_t>> getSmallRJetTOBs() override;
virtual std::vector<std::vector<uint32_t>> getLargeRJetTOBs() override;
virtual std::vector<std::vector<uint32_t>> getTauTOBs() override;
......
......@@ -58,7 +58,7 @@ namespace LVL1 {
/** standard Athena-Algorithm method */
virtual StatusCode finalize () override;
virtual StatusCode execute() override ;
virtual StatusCode execute(jFEXOutputCollection* inputOutputCollection) override ;
virtual void init() override ;
......
......@@ -80,6 +80,6 @@ StreamAOD.ItemList+=["xAOD::TauJetAuxContainer#TauJetsAux.-VertexedClusters."]
log.info("==========================================================")
log.info("Scheduling jFEXDriver")
athAlgSeq += CfgMgr.LVL1__jFEXDriver('MyjFEXDriver')
#athAlgSeq += CfgMgr.LVL1__jFEXNtupleWriter('MyjFEXNtupleWriter')
# athAlgSeq += CfgMgr.LVL1__jFEXNtupleWriter('MyjFEXNtupleWriter')
log.info("==========================================================")
#######################################################
......@@ -84,7 +84,7 @@ StatusCode jFEXDriver::initialize()
ATH_CHECK( m_jFexLRJetEDMKey.initialize() );
ATH_CHECK( m_jFexTauEDMKey.initialize() );
//ATH_CHECK( m_jFEXOutputCollectionSGKey.initialize() );
ATH_CHECK( m_jFEXOutputCollectionSGKey.initialize() );
return StatusCode::SUCCESS;
......@@ -117,22 +117,8 @@ StatusCode jFEXDriver::finalize()
// STEP 1 TO BE REPLACED IN THE NEAR FUTURE - KEPT HERE FOR REFERENCE
// STEP 1 - Do some monitoring (code to exported in the future to another algorithm accessing only StoreGate and not appearing in this algorithm)
jFEXOutputCollection* my_jFEXOutputCollection = new jFEXOutputCollection();
//std::shared_ptr<jFEXOutputCollection> my_jFEXOutputCollection = std::make_shared<jFEXOutputCollection>();
bool savetob = true;
if(savetob)
{
StatusCode sctob = evtStore()->record(my_jFEXOutputCollection,"jFEXOutputCollection");
if(sctob == StatusCode::SUCCESS){}
else if (sctob == StatusCode::FAILURE){ATH_MSG_ERROR("Event " << m_numberOfEvents << " , Failed to put jFEXOutputCollection into Storegate.");}
//SG::WriteHandle<jFEXOutputCollection> jFEXOutputCollectionSG(m_jFEXOutputCollectionSGKey,ctx);
//ATH_CHECK(jFEXOutputCollectionSG.record(std::make_unique<jFEXOutputCollection>()));
}
my_jFEXOutputCollection->setdooutput(true);
// STEP 2 - Make some jTowers and fill the local container
m_jTowerBuilderTool->init(local_jTowerContainerRaw);
......@@ -154,18 +140,23 @@ StatusCode jFEXDriver::finalize()
m_jFEXSysSimTool->init();
// STEP 6 - Run THE jFEXSysSim
ATH_CHECK(m_jFEXSysSimTool->execute());
ATH_CHECK(m_jFEXSysSimTool->execute(my_jFEXOutputCollection));
//STEP 6.5- test the EDMs
ATH_CHECK(testSRJetEDM());
ATH_CHECK(testLRJetEDM());
ATH_CHECK(testTauEDM());
// STEP 7 - Close and clean the event
// STEP 7 - Close and clean the event
m_jFEXSysSimTool->cleanup();
m_jSuperCellTowerMapperTool->reset();
m_jTowerBuilderTool->reset();
// STEP 8 - Write the completed jFEXOutputCollection into StoreGate (move the local copy in memory)
std::unique_ptr<jFEXOutputCollection> local_jFEXOutputCollection = std::unique_ptr<jFEXOutputCollection>(my_jFEXOutputCollection);
SG::WriteHandle<LVL1::jFEXOutputCollection> jFEXOutputCollectionSG(m_jFEXOutputCollectionSGKey);
ATH_CHECK(jFEXOutputCollectionSG.record(std::move(local_jFEXOutputCollection)));
ATH_MSG_DEBUG("Executed " << name() << ", closing event number " << m_numberOfEvents );
m_numberOfEvents++;
......@@ -186,7 +177,7 @@ StatusCode jFEXDriver::testSRJetEDM(){
for(const auto& it : * myRoIContainer){
myRoI = it;
ATH_MSG_DEBUG("SR Jet EDM jFex Number: "
<< +myRoI->jFexNumber() // returns an 8 bit unsigned integer referring to the eFEX number
<< +myRoI->jFexNumber() // returns an 8 bit unsigned integer referring to the jFEX number
<< " et: "
<< myRoI->et() // returns the et value of the EM cluster in MeV
<< " eta: "
......@@ -213,7 +204,7 @@ StatusCode jFEXDriver::testLRJetEDM(){
for(const auto& it : * myRoIContainer){
myRoI = it;
ATH_MSG_DEBUG("LR Jet EDM jFex Number: "
<< +myRoI->jFexNumber() // returns an 8 bit unsigned integer referring to the eFEX number
<< +myRoI->jFexNumber() // returns an 8 bit unsigned integer referring to the jFEX number
<< " et: "
<< myRoI->et() // returns the et value of the EM cluster in MeV
<< " eta: "
......@@ -240,7 +231,7 @@ StatusCode jFEXDriver::testTauEDM(){
for(const auto& it : * myRoIContainer){
myRoI = it;
ATH_MSG_DEBUG("EDM jFex Number: "
<< +myRoI->jFexNumber() // returns an 8 bit unsigned integer referring to the eFEX number
<< +myRoI->jFexNumber() // returns an 8 bit unsigned integer referring to the jFEX number
<< " et: "
<< myRoI->et() // returns the et value of the EM cluster in MeV
<< " eta: "
......
......@@ -92,15 +92,13 @@ void jFEXFPGA::reset() {
}
StatusCode jFEXFPGA::execute() {
StatusCode jFEXFPGA::execute(jFEXOutputCollection* inputOutputCollection) {
SG::ReadHandle<jTowerContainer> jk_jFEXFPGA_jTowerContainer(m_jFEXFPGA_jTowerContainerKey/*,ctx*/);
if(!jk_jFEXFPGA_jTowerContainer.isValid()) {
ATH_MSG_FATAL("Could not retrieve jk_jFEXFPGA_jTowerContainer " << m_jFEXFPGA_jTowerContainerKey.key() );
return StatusCode::FAILURE;
}
jFEXOutputCollection* jFEXOutputs = nullptr;
ATH_CHECK( evtStore()->retrieve(jFEXOutputs, "jFEXOutputCollection") );
ATH_CHECK( m_jFEXPileupAndNoiseTool->safetyTest());
ATH_CHECK( m_jFEXPileupAndNoiseTool->reset());
......@@ -117,14 +115,14 @@ StatusCode jFEXFPGA::execute() {
//Calculating and sustracting pileup
std::vector<int> pileup_rho;
pileup_rho = m_jFEXPileupAndNoiseTool->CalculatePileup();
jFEXOutputs->addValue_pileup("pileup_FPGAid", m_id);
jFEXOutputs->addValue_pileup("pileup_jFEXid", m_jfexid);
jFEXOutputs->addValue_pileup("pileup_rho_EM", pileup_rho[0]);
jFEXOutputs->addValue_pileup("pileup_rho_HAD1", pileup_rho[1]);
jFEXOutputs->addValue_pileup("pileup_rho_HAD2", pileup_rho[2]);
jFEXOutputs->addValue_pileup("pileup_rho_HAD3", pileup_rho[3]);
jFEXOutputs->addValue_pileup("pileup_rho_FCAL", pileup_rho[4]);
jFEXOutputs->fill_pileup();
inputOutputCollection->addValue_pileup("pileup_FPGAid", m_id);
inputOutputCollection->addValue_pileup("pileup_jFEXid", m_jfexid);
inputOutputCollection->addValue_pileup("pileup_rho_EM", pileup_rho[0]);
inputOutputCollection->addValue_pileup("pileup_rho_HAD1", pileup_rho[1]);
inputOutputCollection->addValue_pileup("pileup_rho_HAD2", pileup_rho[2]);
inputOutputCollection->addValue_pileup("pileup_rho_HAD3", pileup_rho[3]);
inputOutputCollection->addValue_pileup("pileup_rho_FCAL", pileup_rho[4]);
inputOutputCollection->fill_pileup();
//Applying pileup sustraction in jet or met independently - this sets the flags to true in m_jFEXPileupAndNoiseTool
// now masked -> no pileup applied.
......@@ -223,14 +221,14 @@ StatusCode jFEXFPGA::execute() {
m_jFEXLargeRJetAlgoTool->setupCluster(largeRCluster_IDs);
m_jFEXSmallRJetAlgoTool->buildSeeds();
bool SRJet_LM = m_jFEXSmallRJetAlgoTool->isSeedLocalMaxima();
jFEXOutputs->addValue_smallRJet("smallRJet_isCentralTowerSeed", SRJet_LM);
inputOutputCollection->addValue_smallRJet("smallRJet_isCentralTowerSeed", SRJet_LM);
int smallClusterET = m_jFEXSmallRJetAlgoTool->getSmallClusterET();
//These are plots of the central TT for each 5x5 search window.
jFEXOutputs->addValue_smallRJet("smallRJet_ET", m_jFEXSmallRJetAlgoTool->getTTowerET(m_jTowersIDs_Thin[mphi][meta]));
jFEXOutputs->addValue_smallRJet("smallRJet_phi",m_jFEXSmallRJetAlgoTool->getRealPhi(m_jTowersIDs_Thin[mphi][meta]));
jFEXOutputs->addValue_smallRJet("smallRJet_eta",m_jFEXSmallRJetAlgoTool->getRealEta(m_jTowersIDs_Thin[mphi][meta]));
inputOutputCollection->addValue_smallRJet("smallRJet_ET", m_jFEXSmallRJetAlgoTool->getTTowerET(m_jTowersIDs_Thin[mphi][meta]));
inputOutputCollection->addValue_smallRJet("smallRJet_phi",m_jFEXSmallRJetAlgoTool->getRealPhi(m_jTowersIDs_Thin[mphi][meta]));
inputOutputCollection->addValue_smallRJet("smallRJet_eta",m_jFEXSmallRJetAlgoTool->getRealEta(m_jTowersIDs_Thin[mphi][meta]));
jFEXOutputs->addValue_smallRJet("smallRJet_clusterET", smallClusterET);
inputOutputCollection->addValue_smallRJet("smallRJet_clusterET", smallClusterET);
if(!SRJet_LM) {
continue;
......@@ -251,20 +249,20 @@ StatusCode jFEXFPGA::execute() {
if (smallClusterET/200. > 0x7ff) SR_TOB_saturated = true;
// for plotting variables in TOBS- internal check:
jFEXOutputs->addValue_smallRJet("smallRJetTOB_eta", tmp_SRJet_tob->setEta(meta_LM)-8);
jFEXOutputs->addValue_smallRJet("smallRJetTOB_phi", tmp_SRJet_tob->setPhi(mphi_LM)-8);
jFEXOutputs->addValue_smallRJet("smallRJetTOB_ET", tmp_SRJet_tob->setET(smallClusterET/200));
jFEXOutputs->addValue_smallRJet("smallRJetTOB_sat", tmp_SRJet_tob->setSat(SR_TOB_saturated));
jFEXOutputs->addValue_smallRJet("smallRJetTOB_jfexID", m_jfexid);
jFEXOutputs->addValue_smallRJet("smallRJetTOB_fpgaID", m_id);
inputOutputCollection->addValue_smallRJet("smallRJetTOB_eta", tmp_SRJet_tob->setEta(meta_LM)-8);
inputOutputCollection->addValue_smallRJet("smallRJetTOB_phi", tmp_SRJet_tob->setPhi(mphi_LM)-8);
inputOutputCollection->addValue_smallRJet("smallRJetTOB_ET", tmp_SRJet_tob->setET(smallClusterET/200));
inputOutputCollection->addValue_smallRJet("smallRJetTOB_sat", tmp_SRJet_tob->setSat(SR_TOB_saturated));
inputOutputCollection->addValue_smallRJet("smallRJetTOB_jfexID", m_jfexid);
inputOutputCollection->addValue_smallRJet("smallRJetTOB_fpgaID", m_id);
uint32_t SRJet_tobword = formSmallRJetTOB(mphi_LM, meta_LM);
m_SRJet_tobwords.push_back(SRJet_tobword);
jFEXOutputs->addValue_smallRJet("smallRJetTOB_word",SRJet_tobword);
jFEXOutputs->addValue_smallRJet("smallRJetTOB_jfexID", m_jfexid);
jFEXOutputs->addValue_smallRJet("smallRJetTOB_fpgaID", m_id);
inputOutputCollection->addValue_smallRJet("smallRJetTOB_word",SRJet_tobword);
inputOutputCollection->addValue_smallRJet("smallRJetTOB_jfexID", m_jfexid);
inputOutputCollection->addValue_smallRJet("smallRJetTOB_fpgaID", m_id);
jFEXOutputs->fill_smallRJet();
inputOutputCollection->fill_smallRJet();
ATH_MSG_DEBUG("==== jFEXLargeRJetAlgo ========");
//LargeRJetAlgo is here as SmallRJetlocalMaxima is a requirement
......@@ -273,27 +271,27 @@ StatusCode jFEXFPGA::execute() {
unsigned int LR_TOB_saturated = 0;
if (largeClusterET/200. > 0x1fff) LR_TOB_saturated = 1;
jFEXOutputs->addValue_largeRJet("largeRJet_ET", largeClusterET);
jFEXOutputs->addValue_largeRJet("largeRJet_phi", m_jFEXSmallRJetAlgoTool->getRealPhi(m_jTowersIDs_Thin[mphi][meta]));
jFEXOutputs->addValue_largeRJet("largeRJet_eta", m_jFEXSmallRJetAlgoTool->getRealEta(m_jTowersIDs_Thin[mphi][meta]));
inputOutputCollection->addValue_largeRJet("largeRJet_ET", largeClusterET);
inputOutputCollection->addValue_largeRJet("largeRJet_phi", m_jFEXSmallRJetAlgoTool->getRealPhi(m_jTowersIDs_Thin[mphi][meta]));
inputOutputCollection->addValue_largeRJet("largeRJet_eta", m_jFEXSmallRJetAlgoTool->getRealEta(m_jTowersIDs_Thin[mphi][meta]));
jFEXOutputs->addValue_largeRJet("largeRJetTOB_ET",tmp_LRJet_tob->setET(largeClusterET/200));
jFEXOutputs->addValue_largeRJet("largeRJetTOB_eta",tmp_SRJet_tob->setEta(meta));
jFEXOutputs->addValue_largeRJet("largeRJetTOB_phi",tmp_SRJet_tob->setPhi(mphi));
jFEXOutputs->addValue_largeRJet("largeRJetTOB_sat",tmp_LRJet_tob->setSat(LR_TOB_saturated));
jFEXOutputs->fill_largeRJet();
inputOutputCollection->addValue_largeRJet("largeRJetTOB_ET",tmp_LRJet_tob->setET(largeClusterET/200));
inputOutputCollection->addValue_largeRJet("largeRJetTOB_eta",tmp_SRJet_tob->setEta(meta));
inputOutputCollection->addValue_largeRJet("largeRJetTOB_phi",tmp_SRJet_tob->setPhi(mphi));
inputOutputCollection->addValue_largeRJet("largeRJetTOB_sat",tmp_LRJet_tob->setSat(LR_TOB_saturated));
inputOutputCollection->fill_largeRJet();
uint32_t LRJet_tobword = formLargeRJetTOB(mphi, meta);
if ( LRJet_tobword != 0 ) m_LRJet_tobwords.push_back(LRJet_tobword);
jFEXOutputs->addValue_largeRJet("largeRJetTOB_word", LRJet_tobword);
jFEXOutputs->addValue_largeRJet("largeRJetTOB_jfexID", m_jfexid);
jFEXOutputs->addValue_largeRJet("largeRJetTOB_fpgaID", m_id);
inputOutputCollection->addValue_largeRJet("largeRJetTOB_word", LRJet_tobword);
inputOutputCollection->addValue_largeRJet("largeRJetTOB_jfexID", m_jfexid);
inputOutputCollection->addValue_largeRJet("largeRJetTOB_fpgaID", m_id);
}
}
} //end of if statement for checking if in central jfex modules
jFEXOutputs->fill_smallRJet();
jFEXOutputs->fill_largeRJet();
inputOutputCollection->fill_smallRJet();
inputOutputCollection->fill_largeRJet();
//**********Forward Jets***********************
......@@ -329,61 +327,61 @@ StatusCode jFEXFPGA::execute() {
unsigned int LRFCAL_TOB_saturated = 0;
if (m_LRJetET/200. > 0x1fff) LRFCAL_TOB_saturated = 1;
jFEXOutputs->addValue_smallRJet("smallRJet_phi", output_centre_phi);
jFEXOutputs->addValue_smallRJet("smallRJet_eta", output_centre_eta);
jFEXOutputs->addValue_smallRJet("smallRJet_clusterET", m_SRJetET);
jFEXOutputs->addValue_smallRJet("smallRJet_sat", SRFCAL_TOB_saturated);
jFEXOutputs->addValue_smallRJet("smallRJet_isCentralTowerSeed",true);
jFEXOutputs->addValue_smallRJet("smallRJetTOB_jfexID", m_jfexid);
jFEXOutputs->addValue_smallRJet("smallRJetTOB_fpgaID", m_id);
inputOutputCollection->addValue_smallRJet("smallRJet_phi", output_centre_phi);
inputOutputCollection->addValue_smallRJet("smallRJet_eta", output_centre_eta);
inputOutputCollection->addValue_smallRJet("smallRJet_clusterET", m_SRJetET);
inputOutputCollection->addValue_smallRJet("smallRJet_sat", SRFCAL_TOB_saturated);
inputOutputCollection->addValue_smallRJet("smallRJet_isCentralTowerSeed",true);
inputOutputCollection->addValue_smallRJet("smallRJetTOB_jfexID", m_jfexid);
inputOutputCollection->addValue_smallRJet("smallRJetTOB_fpgaID", m_id);
if(m_jfexid == 0) {
jFEXOutputs->addValue_smallRJet("smallRJetTOB_eta", 36-ieta);
jFEXOutputs->addValue_largeRJet("largeRJetTOB_eta", 36-ieta);
inputOutputCollection->addValue_smallRJet("smallRJetTOB_eta", 36-ieta);
inputOutputCollection->addValue_largeRJet("largeRJetTOB_eta", 36-ieta);
}
if(m_jfexid == 5) {
jFEXOutputs->addValue_smallRJet("smallRJetTOB_eta", ieta-8);
jFEXOutputs->addValue_largeRJet("largeRJetTOB_eta", ieta-8);
inputOutputCollection->addValue_smallRJet("smallRJetTOB_eta", ieta-8);
inputOutputCollection->addValue_largeRJet("largeRJetTOB_eta", ieta-8);
}
if(iphi >=FEXAlgoSpaceDefs::jFEX_algoSpace_EMB_start_phi && iphi< FEXAlgoSpaceDefs::jFEX_algoSpace_EMB_end_phi) {
jFEXOutputs->addValue_smallRJet("smallRJetTOB_phi", iphi-8);
jFEXOutputs->addValue_largeRJet("largeRJetTOB_phi", iphi-8);
inputOutputCollection->addValue_smallRJet("smallRJetTOB_phi", iphi-8);
inputOutputCollection->addValue_largeRJet("largeRJetTOB_phi", iphi-8);
}
if(iphi >=FEXAlgoSpaceDefs::jFEX_algoSpace_EMIE_start_phi && iphi< FEXAlgoSpaceDefs::jFEX_algoSpace_EMIE_end_phi) {
jFEXOutputs->addValue_smallRJet("smallRJetTOB_phi", iphi-4);
jFEXOutputs->addValue_largeRJet("largeRJetTOB_phi", iphi-4);
inputOutputCollection->addValue_smallRJet("smallRJetTOB_phi", iphi-4);
inputOutputCollection->addValue_largeRJet("largeRJetTOB_phi", iphi-4);
}
if(iphi >=FEXAlgoSpaceDefs::jFEX_algoSpace_FCAL_start_phi && iphi< FEXAlgoSpaceDefs::jFEX_algoSpace_FCAL_end_phi) {
jFEXOutputs->addValue_smallRJet("smallRJetTOB_phi", iphi-2);
jFEXOutputs->addValue_largeRJet("largeRJetTOB_phi", iphi-2);
inputOutputCollection->addValue_smallRJet("smallRJetTOB_phi", iphi-2);
inputOutputCollection->addValue_largeRJet("largeRJetTOB_phi", iphi-2);
}
jFEXOutputs->addValue_smallRJet("smallRJetTOB_ET", m_SRJetET/200);
jFEXOutputs->addValue_smallRJet("smallRJetTOB_sat", SRFCAL_TOB_saturated);
inputOutputCollection->addValue_smallRJet("smallRJetTOB_ET", m_SRJetET/200);
inputOutputCollection->addValue_smallRJet("smallRJetTOB_sat", SRFCAL_TOB_saturated);
jFEXOutputs->addValue_smallRJet("smallRJetTOB_word", SRFCAL_Jet_tobword);
jFEXOutputs->addValue_smallRJet("smallRJetTOB_jfexID", m_jfexid);
jFEXOutputs->addValue_smallRJet("smallRJetTOB_fpgaID", m_id);
inputOutputCollection->addValue_smallRJet("smallRJetTOB_word", SRFCAL_Jet_tobword);
inputOutputCollection->addValue_smallRJet("smallRJetTOB_jfexID", m_jfexid);
inputOutputCollection->addValue_smallRJet("smallRJetTOB_fpgaID", m_id);
//Output Collection for Large R Jet
jFEXOutputs->addValue_largeRJet("largeRJet_ET", m_LRJetET);
jFEXOutputs->addValue_largeRJet("largeRJet_phi", output_centre_phi);
jFEXOutputs->addValue_largeRJet("largeRJet_eta", output_centre_eta);
jFEXOutputs->addValue_largeRJet("largeRJet_sat", LRFCAL_TOB_saturated);
inputOutputCollection->addValue_largeRJet("largeRJet_ET", m_LRJetET);
inputOutputCollection->addValue_largeRJet("largeRJet_phi", output_centre_phi);
inputOutputCollection->addValue_largeRJet("largeRJet_eta", output_centre_eta);
inputOutputCollection->addValue_largeRJet("largeRJet_sat", LRFCAL_TOB_saturated);
jFEXOutputs->addValue_largeRJet("largeRJetTOB_ET", m_LRJetET/200);
jFEXOutputs->addValue_largeRJet("largeRJetTOB_sat",LRFCAL_TOB_saturated);
inputOutputCollection->addValue_largeRJet("largeRJetTOB_ET", m_LRJetET/200);
inputOutputCollection->addValue_largeRJet("largeRJetTOB_sat",LRFCAL_TOB_saturated);
jFEXOutputs->addValue_largeRJet("largeRJetTOB_word", LRFCAL_Jet_tobword);
jFEXOutputs->addValue_largeRJet("largeRJetTOB_jfexID", m_jfexid);
jFEXOutputs->addValue_largeRJet("largeRJetTOB_fpgaID", m_id);
inputOutputCollection->addValue_largeRJet("largeRJetTOB_word", LRFCAL_Jet_tobword);
inputOutputCollection->addValue_largeRJet("largeRJetTOB_jfexID", m_jfexid);
inputOutputCollection->addValue_largeRJet("largeRJetTOB_fpgaID", m_id);
}
jFEXOutputs->fill_smallRJet();
jFEXOutputs->fill_largeRJet();
inputOutputCollection->fill_smallRJet();
inputOutputCollection->fill_largeRJet();
} //end of if statement for checking if in central jfex modules
......@@ -449,16 +447,16 @@ StatusCode jFEXFPGA::execute() {
bool is_tau_LocalMax = m_jFEXtauAlgoTool->isSeedLocalMaxima();
m_jFEXtauAlgoTool->setFirstEtRing(TT_First_ETring);
jFEXOutputs->addValue_tau("tau_ET", m_jFEXtauAlgoTool->getTTowerET(m_jTowersIDs[mphi][meta]));
jFEXOutputs->addValue_tau("tau_clusterET", m_jFEXtauAlgoTool->getClusterEt());
jFEXOutputs->addValue_tau("tau_eta",std::abs(m_jFEXtauAlgoTool->getRealEta(m_jTowersIDs[mphi][meta]))) ;
jFEXOutputs->addValue_tau("tau_phi",m_jFEXtauAlgoTool->getRealPhi(m_jTowersIDs[mphi][meta])) ;
jFEXOutputs->addValue_tau("tau_realeta",m_jFEXtauAlgoTool->getRealEta(m_jTowersIDs[mphi][meta])) ;
jFEXOutputs->addValue_tau("tau_ISO",m_jFEXtauAlgoTool->getFirstEtRing()) ;
jFEXOutputs->addValue_tau("tau_TT_ID",TT_seed_ID[1][1]) ;
jFEXOutputs->addValue_tau("tau_isLocalMax",is_tau_LocalMax) ;
jFEXOutputs->addValue_tau("tau_jFEXid",m_jfexid) ;
jFEXOutputs->addValue_tau("tau_FPGAid",m_id) ;
inputOutputCollection->addValue_tau("tau_ET", m_jFEXtauAlgoTool->getTTowerET(m_jTowersIDs[mphi][meta]));
inputOutputCollection->addValue_tau("tau_clusterET", m_jFEXtauAlgoTool->getClusterEt());
inputOutputCollection->addValue_tau("tau_eta",std::abs(m_jFEXtauAlgoTool->getRealEta(m_jTowersIDs[mphi][meta]))) ;
inputOutputCollection->addValue_tau("tau_phi",m_jFEXtauAlgoTool->getRealPhi(m_jTowersIDs[mphi][meta])) ;
inputOutputCollection->addValue_tau("tau_realeta",m_jFEXtauAlgoTool->getRealEta(m_jTowersIDs[mphi][meta])) ;
inputOutputCollection->addValue_tau("tau_ISO",m_jFEXtauAlgoTool->getFirstEtRing()) ;
inputOutputCollection->addValue_tau("tau_TT_ID",TT_seed_ID[1][1]) ;
inputOutputCollection->addValue_tau("tau_isLocalMax",is_tau_LocalMax) ;
inputOutputCollection->addValue_tau("tau_jFEXid",m_jfexid) ;
inputOutputCollection->addValue_tau("tau_FPGAid",m_id) ;
uint32_t tobword = formTauTOB(mphi, meta);
if ( is_tau_LocalMax ) {
......@@ -467,14 +465,14 @@ StatusCode jFEXFPGA::execute() {
std::unique_ptr<jFEXtauTOB> tmp_tob = m_jFEXtauAlgoTool->getTauTOBs(mphi, meta);
// for plotting variables in TOBS- internal check:
jFEXOutputs->addValue_tau("tau_TOB_word",tobword);
jFEXOutputs->addValue_tau("tau_TOB_ET",tmp_tob->GetET());
jFEXOutputs->addValue_tau("tau_TOB_eta",tmp_tob->GetEta());
jFEXOutputs->addValue_tau("tau_TOB_phi",tmp_tob->GetPhi());
jFEXOutputs->addValue_tau("tau_TOB_ISO",tmp_tob->GetIso());
jFEXOutputs->addValue_tau("tau_TOB_Sat",tmp_tob->GetSat());
jFEXOutputs->fill_tau();
inputOutputCollection->addValue_tau("tau_TOB_word",tobword);
inputOutputCollection->addValue_tau("tau_TOB_ET",tmp_tob->GetET());
inputOutputCollection->addValue_tau("tau_TOB_eta",tmp_tob->GetEta());
inputOutputCollection->addValue_tau("tau_TOB_phi",tmp_tob->GetPhi());
inputOutputCollection->addValue_tau("tau_TOB_ISO",tmp_tob->GetIso());
inputOutputCollection->addValue_tau("tau_TOB_Sat",tmp_tob->GetSat());
inputOutputCollection->fill_tau();
}
}
......
......@@ -3,7 +3,7 @@
*/
//***************************************************************************
// jFEXNtupleWriter.cxx - copied from eFEXNtupleWrite by Tong Qui
// jFEXNtupleWriter.cxx - copied from eFEXNtupleWrite by Tong Qiu
// -------------------
// begin : 12 12 2020
// email : varsiha.sothilingam@cern.ch
......@@ -39,6 +39,7 @@ StatusCode LVL1::jFEXNtupleWriter::initialize () {
CHECK( histSvc.retrieve() );
m_myTree = new TTree("data","data");
CHECK( histSvc->regTree("/ANALYSIS/data",m_myTree) );
ATH_CHECK( m_jFEXOutputCollectionSGKey.initialize() );
/*
m_load_truth_jet = false;
......@@ -104,7 +105,7 @@ StatusCode LVL1::jFEXNtupleWriter::initialize () {
m_myTree->Branch ("tau_TOB_ISO", &m_tau_TOB_ISO);
m_myTree->Branch ("tau_TOB_Sat", &m_tau_TOB_Sat);
//Pileup
//Pileup
m_myTree->Branch ("pileup_FPGAid", &m_pileup_FPGAid);
m_myTree->Branch ("pileup_jFEXid", &m_pileup_jFEXid);
m_myTree->Branch ("pileup_rho_EM", &m_pileup_rho_EM);
......@@ -118,20 +119,22 @@ StatusCode LVL1::jFEXNtupleWriter::initialize () {
}
StatusCode LVL1::jFEXNtupleWriter::execute () {
SG::ReadHandle<LVL1::jFEXOutputCollection> jFEXOutputCollectionobj = SG::ReadHandle<LVL1::jFEXOutputCollection>(m_jFEXOutputCollectionSGKey/*,ctx*/);
if(!jFEXOutputCollectionobj.isValid()){
ATH_MSG_FATAL("Could not retrieve jFEXOutputCollection " << m_jFEXOutputCollectionSGKey.key());
return StatusCode::FAILURE;
}
if (!jFEXOutputCollectionobj->getdooutput()) {
return StatusCode::SUCCESS;
}
//ATH_MSG_DEBUG("==== jFEXNtupleWriter ============ execute()");
ServiceHandle<StoreGateSvc> evtStore("StoreGateSvc/StoreGateSvc", "arbitrary");
CHECK(evtStore.retrieve() );
m_jFEXOutputCollection = new jFEXOutputCollection();
CHECK(evtStore->retrieve(m_jFEXOutputCollection, "jFEXOutputCollection"));
CHECK(loadsmallRJetAlgoVariables());
CHECK(loadlargeRJetAlgoVariables());
CHECK(loadtauAlgoVariables());
CHECK(loadPileupVariables());
CHECK(loadsmallRJetAlgoVariables(jFEXOutputCollectionobj));
CHECK(loadlargeRJetAlgoVariables(jFEXOutputCollectionobj));
CHECK(loadtauAlgoVariables(jFEXOutputCollectionobj));
CHECK(loadPileupVariables(jFEXOutputCollectionobj));
m_myTree->Fill();
m_jFEXOutputCollection->clear();
return StatusCode::SUCCESS;
}
......@@ -140,7 +143,7 @@ StatusCode LVL1::jFEXNtupleWriter::finalize () {
return StatusCode::SUCCESS;
}
StatusCode LVL1::jFEXNtupleWriter::loadsmallRJetAlgoVariables() {
StatusCode LVL1::jFEXNtupleWriter::loadsmallRJetAlgoVariables(SG::ReadHandle<LVL1::jFEXOutputCollection> jFEXOutputCollectionobj) {
m_smallRJet_eta.clear();
m_smallRJet_phi.clear();
m_smallRJet_isCentralTowerSeed.clear();
......@@ -154,25 +157,25 @@ StatusCode LVL1::jFEXNtupleWriter::loadsmallRJetAlgoVariables() {
m_smallRJetTOB_jfexID.clear();
m_smallRJetTOB_fpgaID.clear();
for (int i = 0; i < m_jFEXOutputCollection->SRsize(); i++)
for (int i = 0; i < jFEXOutputCollectionobj->SRsize(); i++)
{
m_smallRJet_isCentralTowerSeed.push_back((*(m_jFEXOutputCollection->get_smallRJet(i)))["smallRJet_isCentralTowerSeed"]);
m_smallRJet_phi.push_back((*(m_jFEXOutputCollection->get_smallRJet(i)))["smallRJet_phi"]);
m_smallRJet_eta.push_back((*(m_jFEXOutputCollection->get_smallRJet(i)))["smallRJet_eta"]);
m_smallRJet_ET.push_back((*(m_jFEXOutputCollection->get_smallRJet(i)))["smallRJet_ET"]);
m_smallRJet_clusterET.push_back((*(m_jFEXOutputCollection->get_smallRJet(i)))["smallRJet_clusterET"]);
m_smallRJetTOB_eta.push_back((*(m_jFEXOutputCollection->get_smallRJet(i)))["smallRJetTOB_eta"]);
m_smallRJetTOB_phi.push_back((*(m_jFEXOutputCollection->get_smallRJet(i)))["smallRJetTOB_phi"]);
m_smallRJetTOB_ET.push_back((*(m_jFEXOutputCollection->get_smallRJet(i)))["smallRJetTOB_ET"]);
m_smallRJetTOB_sat.push_back((*(m_jFEXOutputCollection->get_smallRJet(i)))["smallRJetTOB_sat"]);
m_smallRJetTOB_word.push_back((*(m_jFEXOutputCollection->get_smallRJet(i)))["smallRJetTOB_word"]);
m_smallRJetTOB_jfexID.push_back((*(m_jFEXOutputCollection->get_smallRJet(i)))["smallRJetTOB_jfexID"]);
m_smallRJetTOB_fpgaID.push_back((*(m_jFEXOutputCollection->get_smallRJet(i)))["smallRJetTOB_fpgaID"]);
m_smallRJet_isCentralTowerSeed.push_back((*(jFEXOutputCollectionobj->get_smallRJet(i)))["smallRJet_isCentralTowerSeed"]);
m_smallRJet_phi.push_back((*(jFEXOutputCollectionobj->get_smallRJet(i)))["smallRJet_phi"]);
m_smallRJet_eta.push_back((*(jFEXOutputCollectionobj->get_smallRJet(i)))["smallRJet_eta"]);
m_smallRJet_ET.push_back((*(jFEXOutputCollectionobj->get_smallRJet(i)))["smallRJet_ET"]);
m_smallRJet_clusterET.push_back((*(jFEXOutputCollectionobj->get_smallRJet(i)))["smallRJet_clusterET"]);
m_smallRJetTOB_eta.push_back((*(jFEXOutputCollectionobj->get_smallRJet(i)))["smallRJetTOB_eta"]);