diff --git a/LArCalorimeter/LArCabling/python/LArCablingAccess.py b/LArCalorimeter/LArCabling/python/LArCablingAccess.py
index ea348063fe32cd5c0c0d53505c9209aab4e78b0b..e938bdf6859aa213fb8cedf5b20107f692fcc8fc 100644
--- a/LArCalorimeter/LArCabling/python/LArCablingAccess.py
+++ b/LArCalorimeter/LArCabling/python/LArCablingAccess.py
@@ -4,6 +4,9 @@ from AthenaCommon.AlgSequence import AthSequencer
 from IOVDbSvc.CondDB import conddb
 from LArRecUtils.LArRecUtilsConf import LArOnOffMappingAlg, LArFebRodMappingAlg, LArCalibLineMappingAlg
 
+from LArConditionsCommon.LArCondFlags import larCondFlags
+
+
 #FIXME, the folder are also set up in LArConditionsCommon/share/LArIdMap_*_jobOptions.py
  
 def LArOnOffIdMapping():
@@ -13,11 +16,14 @@ def LArOnOffIdMapping():
 
     if conddb.isMC:
         dbname="LAR_OFL"
+        larCondFlags.config_idmap_MC()
     else:
         dbname="LAR"
 
+    
     folder="/LAR/Identifier/OnOffIdMap"
     conddb.addFolder(dbname,folder,className="AthenaAttributeList")
+    larCondFlags.addTag(folder,conddb)
     condSequence+=LArOnOffMappingAlg(ReadKey=folder)
     return
 
@@ -44,11 +50,13 @@ def LArFebRodMapping():
 
     if conddb.isMC:
         dbname="LAR_OFL"
+        larCondFlags.config_idmap_MC()
     else:
         dbname="LAR"
 
     folder="/LAR/Identifier/FebRodMap"
     conddb.addFolder(dbname,folder,className="AthenaAttributeList")
+    larCondFlags.addTag(folder,conddb)
     condSequence+=LArFebRodMappingAlg(ReadKey=folder)
     return
 
@@ -60,11 +68,14 @@ def LArCalibIdMapping():
 
     if conddb.isMC:
         dbname="LAR_OFL"
+        larCondFlags.config_idmap_MC()
     else:
         dbname="LAR"
+        larCondFlags.config_idmap_comm()
 
     folder="/LAR/Identifier/CalibIdMap"
     conddb.addFolder(dbname,folder,className="AthenaAttributeList")
+    larCondFlags.addTag(folder,conddb)
     condSequence+=LArCalibLineMappingAlg(ReadKey=folder)
     return
 
diff --git a/LArCalorimeter/LArExample/LArConditionsCommon/python/LArCondFlags.py b/LArCalorimeter/LArExample/LArConditionsCommon/python/LArCondFlags.py
index c3e16997871eaac15d6763354b5018019bf38185..a809b87757ccfb3ec2ede6f0222b7ca9447bd11e 100644
--- a/LArCalorimeter/LArExample/LArConditionsCommon/python/LArCondFlags.py
+++ b/LArCalorimeter/LArExample/LArConditionsCommon/python/LArCondFlags.py
@@ -445,7 +445,7 @@ class LArCondFlags(JobPropertyContainer):
 
         # set the tag for OnOffIdMap
         if "/LAR/Identifier/OnOffIdMap" in self.LArCondFolderTags():
-            self._log.info(' using user specified tag for /LAR/Identifier/OnOffIdMap' , self.LArCondFolderTags()['/LAR/Identifier/OnOffIdMap'])
+            self._log.info(' using user specified tag for /LAR/Identifier/OnOffIdMap %s' , self.LArCondFolderTags()['/LAR/Identifier/OnOffIdMap'])
         else :
             if DDVtype=="" or DDVtype not in self.DDVtoOnOffIdMCTag():
                 self._log.error(' unable to find a proper DDV type  for LArOnOffIdMap, DDV '+theDDV+', DDVtype='+DDVtype+',  set DDVtype to the latest ')
@@ -456,7 +456,7 @@ class LArCondFlags(JobPropertyContainer):
 
         # set the tag for CalibIdMap
         if "/LAR/Identifier/CalibIdMap" in self.LArCondFolderTags():
-            self._log.info(' using user specified tag for /LAR/Identifier/CalibIdMap' , self.LArCondFolderTags()['/LAR/Identifier/CalibIdMap'])
+            self._log.info(' using user specified tag for /LAR/Identifier/CalibIdMap %s' , self.LArCondFolderTags()['/LAR/Identifier/CalibIdMap'])
         else :
             if DDVtype=="" or DDVtype not in self.DDVtoCalibIdMCTag():
                 self._log.error(' unable to find a proper DDV type  for LArCalibIdMap, DDV '+theDDV+', DDVtype='+DDVtype+',  set DDVtype to the latest ')
diff --git a/LArCalorimeter/LArExample/LArConditionsCommon/share/LArIdMap_comm_jobOptions.py b/LArCalorimeter/LArExample/LArConditionsCommon/share/LArIdMap_comm_jobOptions.py
index a8582c43752681878c3e124745064ef59157ad6c..9963bcebd43820492a1082be615b05aefc3e8f14 100755
--- a/LArCalorimeter/LArExample/LArConditionsCommon/share/LArIdMap_comm_jobOptions.py
+++ b/LArCalorimeter/LArExample/LArConditionsCommon/share/LArIdMap_comm_jobOptions.py
@@ -21,12 +21,17 @@ from IOVDbSvc.CondDB import conddb
 
 condSeq = AthSequencer("AthCondSeq")
 
-conddb.addFolder(LArDB,"/LAR/Identifier/OnOffIdMap"+LArDBConnection,className="AthenaAttributeList")
-condSeq+=LArOnOffMappingAlg(ReadKey="/LAR/Identifier/OnOffIdMap")
-
-conddb.addFolder(LArDB,"/LAR/Identifier/CalibIdMap"+LArDBConnection,className="AthenaAttributeList")
-condSeq+=LArCalibLineMappingAlg(ReadKey="/LAR/Identifier/CalibIdMap")
-
-conddb.addFolder(LArDB,"/LAR/Identifier/FebRodMap"+LArDBConnection,className="AthenaAttributeList")
-condSeq+=LArFebRodMappingAlg(ReadKey="/LAR/Identifier/FebRodMap")
-    
+if not hasattr( condSeq, 'LArOnOffMappingAlg' ):
+  conddb.addFolder(LArDB,"/LAR/Identifier/OnOffIdMap"+LArDBConnection,className="AthenaAttributeList")
+  larCondFlags.addTag("/LAR/Identifier/OnOffIdMap", conddb)
+  condSeq+=LArOnOffMappingAlg(ReadKey="/LAR/Identifier/OnOffIdMap")
+
+if not hasattr( condSeq, "LArCalibLineMappingAlg"):
+  conddb.addFolder(LArDB,"/LAR/Identifier/CalibIdMap"+LArDBConnection,className="AthenaAttributeList")
+  larCondFlags.addTag("/LAR/Identifier/CalibIdMap", conddb)
+  condSeq+=LArCalibLineMappingAlg(ReadKey="/LAR/Identifier/CalibIdMap")
+
+if not hasattr( condSeq, "LArFebRodMappingAlg"):
+  conddb.addFolder(LArDB,"/LAR/Identifier/FebRodMap"+LArDBConnection,className="AthenaAttributeList")
+  larCondFlags.addTag("/LAR/Identifier/FebRodMap", conddb)
+  condSeq+=LArFebRodMappingAlg(ReadKey="/LAR/Identifier/FebRodMap")
diff --git a/LArCalorimeter/LArRegionSelector/src/RegSelCondAlg_LAr.cxx b/LArCalorimeter/LArRegionSelector/src/RegSelCondAlg_LAr.cxx
index 755a015b96b154ee93a46eccac6744fe0b1e6f6e..50a446ecbf5db26f737e7d781a103bf091b59a25 100644
--- a/LArCalorimeter/LArRegionSelector/src/RegSelCondAlg_LAr.cxx
+++ b/LArCalorimeter/LArRegionSelector/src/RegSelCondAlg_LAr.cxx
@@ -78,12 +78,17 @@ StatusCode RegSelCondAlg_LAr::execute(const EventContext& ctx)  const {
   /// Once the calorimeter has it own conditions data cabling, then we can
   /// dispense with this and use the calorimeter conditions data directly
 
-  SG::ReadCondHandle<PixelCablingCondData> cabling( m_cablingKey, ctx );
+  SG::ReadCondHandle<LArOnOffIdMapping> cablingHdl(m_cablingKey,ctx);
+  const LArOnOffIdMapping* cabling{*cablingHdl};
+  if(!cabling) {
+     ATH_MSG_ERROR( "Do not have cabling mapping from key " << m_cablingKey.key() );
+     return StatusCode::FAILURE;
+  }
 
   EventIDRange id_range;
   
-  if( !cabling.range( id_range ) ) {
-    ATH_MSG_ERROR("Failed to retrieve validity range for " << cabling.key());
+  if( !cablingHdl.range( id_range ) ) {
+    ATH_MSG_ERROR("Failed to retrieve validity range for " << cablingHdl.key());
     return StatusCode::FAILURE;
   }   
 
diff --git a/LArCalorimeter/LArRegionSelector/src/RegSelCondAlg_LAr.h b/LArCalorimeter/LArRegionSelector/src/RegSelCondAlg_LAr.h
index bd7966c769e9217587039aaa2ce01edb109d2d11..632b6e71965049316a0559d6d9236ba690bb8e2c 100644
--- a/LArCalorimeter/LArRegionSelector/src/RegSelCondAlg_LAr.h
+++ b/LArCalorimeter/LArRegionSelector/src/RegSelCondAlg_LAr.h
@@ -26,7 +26,7 @@
 
 #include <string>
 
-#include "PixelConditionsData/PixelCablingCondData.h"
+#include "LArCabling/LArOnOffIdMapping.h"
 
 
 
@@ -52,8 +52,8 @@ private:
   /// some cabling cond data to act as a flag to schedule the algorithm
   /// sadly have to use the pixel cabling if the calorimeter doesn't have
   /// it's own conditions data version 
-  SG::ReadCondHandleKey<PixelCablingCondData> m_cablingKey
-    {this, "CablingCondData", "PixelCablingCondData", "Pixel cabling key"};
+  SG::ReadCondHandleKey<LArOnOffIdMapping> m_cablingKey
+    {this, "CablingKey", "LArOnOffIdMap", "LAr cabling key"};
 
   /// Output conditions object
   SG::WriteCondHandleKey<IRegSelLUTCondData> m_tableKey  
diff --git a/TileCalorimeter/TileRawUtils/src/RegSelCondAlg_Tile.cxx b/TileCalorimeter/TileRawUtils/src/RegSelCondAlg_Tile.cxx
index 3d567db0f39f9f2d8072a196a7cd021dd5e4d2a8..4f9d8972f64f61699b73b69f4604a8419f353595 100644
--- a/TileCalorimeter/TileRawUtils/src/RegSelCondAlg_Tile.cxx
+++ b/TileCalorimeter/TileRawUtils/src/RegSelCondAlg_Tile.cxx
@@ -87,12 +87,17 @@ StatusCode RegSelCondAlg_Tile::execute(const EventContext& ctx)  const {
   /// Once the calorimeter has it own conditions data cabling, then we can
   /// dispense with this and use the calorimeter conditions data directly
 
-  SG::ReadCondHandle<PixelCablingCondData> cabling( m_cablingKey, ctx );
+  SG::ReadCondHandle<LArOnOffIdMapping> cablingHdl(m_cablingKey,ctx);
+  const LArOnOffIdMapping* cabling{*cablingHdl};
+  if(!cabling) {
+     ATH_MSG_ERROR( "Do not have cabling mapping from key " << m_cablingKey.key() );
+     return StatusCode::FAILURE;
+  }
 
   EventIDRange id_range;
   
-  if( !cabling.range( id_range ) ) {
-    ATH_MSG_ERROR("Failed to retrieve validity range for " << cabling.key());
+  if( !cablingHdl.range( id_range ) ) {
+    ATH_MSG_ERROR("Failed to retrieve validity range for " << cablingHdl.key());
     return StatusCode::FAILURE;
   }   
 
diff --git a/TileCalorimeter/TileRawUtils/src/RegSelCondAlg_Tile.h b/TileCalorimeter/TileRawUtils/src/RegSelCondAlg_Tile.h
index 392733a15205215944c09b70221e12e9a907da70..c3655a7899eb426608823f7807024db80999368a 100644
--- a/TileCalorimeter/TileRawUtils/src/RegSelCondAlg_Tile.h
+++ b/TileCalorimeter/TileRawUtils/src/RegSelCondAlg_Tile.h
@@ -23,7 +23,8 @@
 
 #include <string>
 
-#include "PixelConditionsData/PixelCablingCondData.h"
+#include "LArCabling/LArOnOffIdMapping.h"
+
 
 
 
@@ -46,11 +47,8 @@ private:
 
   bool        m_printTable;
    
-  /// some cabling cond data to act as a flag to schedule the algorithm
-  /// sadly have to use the pixel cabling if the calorimeter doesn't have
-  /// it's own conditions data version 
-  SG::ReadCondHandleKey<PixelCablingCondData> m_cablingKey
-    {this, "CablingCondData", "PixelCablingCondData", "Pixel cabling key"};
+  SG::ReadCondHandleKey<LArOnOffIdMapping> m_cablingKey
+    {this, "CablingKey", "LArOnOffIdMap", "LAr cabling key"};
 
   /// Output conditions object
   SG::WriteCondHandleKey<IRegSelLUTCondData> m_tableKey  
diff --git a/Trigger/TrigAlgorithms/TrigCaloRec/python/TrigCaloRecConfig.py b/Trigger/TrigAlgorithms/TrigCaloRec/python/TrigCaloRecConfig.py
index 5cf0262d46fe31297cb93eea0cbe0f461c6efb0c..484a9ac0bd534e62450343c8f20ff05942267147 100755
--- a/Trigger/TrigAlgorithms/TrigCaloRec/python/TrigCaloRecConfig.py
+++ b/Trigger/TrigAlgorithms/TrigCaloRec/python/TrigCaloRecConfig.py
@@ -1608,7 +1608,7 @@ class HLTCaloCellMaker (_HLTCaloCellMaker):
     def __init__(self, name):
         super( HLTCaloCellMaker, self ).__init__(name)
         self.ExtraInputs=[('TileEMScale','ConditionStore+TileEMScale'),('TileBadChannels','ConditionStore+TileBadChannels')]
-        self.ExtraInputs+=[( 'LArOnOffIdMapping' , 'ConditionStore+LArOnOffIdMap' )]
+        self.ExtraInputs+=[( 'IRegSelLUTCondData' , 'ConditionStore+RegSelLUTCondData_TTEM' ), ( 'IRegSelLUTCondData' , 'ConditionStore+RegSelLUTCondData_TTHEC' ), ( 'IRegSelLUTCondData' , 'ConditionStore+RegSelLUTCondData_TILE' ), ( 'IRegSelLUTCondData' , 'ConditionStore+RegSelLUTCondData_FCALEM' ), ( 'IRegSelLUTCondData' , 'ConditionStore+RegSelLUTCondData_FCALHAD' ) ]
         from AthenaMonitoringKernel.GenericMonitoringTool import GenericMonitoringTool
         monTool = GenericMonitoringTool('MonTool')
         maxNumberOfCells=1600.0
diff --git a/Trigger/TrigAlgorithms/TrigT2CaloCommon/python/TrigT2CaloCommonConfig.py b/Trigger/TrigAlgorithms/TrigT2CaloCommon/python/TrigT2CaloCommonConfig.py
index da261e7bd2ffbc73e675b56cc4fbe3a13b4f718e..43d44eb02c0297eef7df154c5c20c450ddd4294d 100644
--- a/Trigger/TrigAlgorithms/TrigT2CaloCommon/python/TrigT2CaloCommonConfig.py
+++ b/Trigger/TrigAlgorithms/TrigT2CaloCommon/python/TrigT2CaloCommonConfig.py
@@ -43,6 +43,17 @@ class TrigCaloDataAccessSvc(_TrigCaloDataAccessSvc):
         from AthenaCommon.Logging import logging
         log = logging.getLogger(name)
 
+        from RegionSelector.RegSelToolConfig import makeRegSelTool_TTEM, makeRegSelTool_TTHEC, makeRegSelTool_FCALEM, makeRegSelTool_FCALHAD, makeRegSelTool_TILE
+        from AthenaCommon.AlgSequence import AthSequencer
+        from LArCabling.LArCablingAccess import LArOnOffIdMapping
+        LArOnOffIdMapping()
+        self.RegSelToolEM = makeRegSelTool_TTEM()
+        self.RegSelToolHEC = makeRegSelTool_TTHEC()
+        self.RegSelToolFCALEM = makeRegSelTool_FCALEM()
+        self.RegSelToolFCALHAD = makeRegSelTool_FCALHAD()
+        self.RegSelToolTILE = makeRegSelTool_TILE()
+        condseq = AthSequencer('AthCondSeq')
+        condseq.RegSelCondAlg_TTEM.RegSelLUT="ConditionStore+RegSelLUTCondData_TTEM"
 
         if ( globalflags.DatabaseInstance == "COMP200" and TriggerFlags.doCaloOffsetCorrection() ) :
             log.warning("Not possible to run BCID offset correction with COMP200")
@@ -88,4 +99,6 @@ class TrigCaloDataAccessSvc(_TrigCaloDataAccessSvc):
             else:
                 log.info('Disable HLT calo offset correction')
 
+
+
         return
diff --git a/Trigger/TrigAlgorithms/TrigT2CaloCommon/src/TrigCaloDataAccessSvc.cxx b/Trigger/TrigAlgorithms/TrigT2CaloCommon/src/TrigCaloDataAccessSvc.cxx
index 114c13b95d074bf87cabeb6c45f3ae95d9397056..5347217b05bfc2ee39a93dfcf1d7137593618e7f 100644
--- a/Trigger/TrigAlgorithms/TrigT2CaloCommon/src/TrigCaloDataAccessSvc.cxx
+++ b/Trigger/TrigAlgorithms/TrigT2CaloCommon/src/TrigCaloDataAccessSvc.cxx
@@ -26,8 +26,12 @@ StatusCode TrigCaloDataAccessSvc::initialize() {
   CHECK( m_larDecoder.retrieve() );
   CHECK( m_tileDecoder.retrieve() );
   CHECK( m_robDataProvider.retrieve() );
-  CHECK( m_regionSelector.retrieve() );
   CHECK( m_bcidAvgKey.initialize() );
+  CHECK( m_regionSelector_TTEM.retrieve() );
+  CHECK( m_regionSelector_TTHEC.retrieve() );
+  CHECK( m_regionSelector_FCALEM.retrieve() );
+  CHECK( m_regionSelector_FCALHAD.retrieve() );
+  CHECK( m_regionSelector_TILE.retrieve() );
 
   return StatusCode::SUCCESS;
 }
@@ -81,7 +85,13 @@ StatusCode TrigCaloDataAccessSvc::loadCollections ( const EventContext& context,
   { 
     // this has to be guarded because getTT called on the LArCollection bu other threads updates internal map
     std::lock_guard<std::mutex> getCollClock{ m_hLTCaloSlot.get( context )->mutex };       
-    m_regionSelector->DetHashIDList( detID, sampling, roi, requestHashIDs );
+    switch ( detID ) {
+    case TTEM: {m_regionSelector_TTEM->HashIDList( sampling, roi, requestHashIDs ); break; }
+    case TTHEC: {m_regionSelector_TTHEC->HashIDList( sampling, roi, requestHashIDs ); break; }
+    case FCALEM: {m_regionSelector_FCALEM->HashIDList( sampling, roi, requestHashIDs ); break; }
+    case FCALHAD: {m_regionSelector_FCALHAD->HashIDList( sampling, roi, requestHashIDs ); break; }
+    default: break;
+    }
   }
   
   ATH_MSG_DEBUG( "requestHashIDs.size() in LoadColl = " << requestHashIDs.size()  << " hash checksum " 
@@ -109,14 +119,14 @@ StatusCode TrigCaloDataAccessSvc::loadCollections ( const EventContext& context,
   std::vector<IdentifierHash> requestHashIDs;
 
   ATH_MSG_DEBUG( "Tile requested for event " << context << " and RoI " << roi );
-  unsigned int sc = prepareTileCollections( context, roi, TILE );
+  unsigned int sc = prepareTileCollections( context, roi );
 
   if ( sc ) return StatusCode::FAILURE;
  
   {
     // this has to be guarded because getTT called on the LArCollection bu other threads updates internal map
     std::lock_guard<std::mutex> getCollClock{ m_hLTCaloSlot.get( context )->mutex };
-    m_regionSelector->DetHashIDList( TILE, roi, requestHashIDs );
+    m_regionSelector_TILE->HashIDList( roi, requestHashIDs );
   }
   ATH_MSG_DEBUG( "requestHashIDs.size() in LoadColl = " << requestHashIDs.size()  << " hash checksum "
                  << std::accumulate( requestHashIDs.begin(), requestHashIDs.end(), IdentifierHash( 0 ),
@@ -280,22 +290,36 @@ unsigned int TrigCaloDataAccessSvc::lateInit() { // non-const this thing
   std::vector<uint32_t> vrodid32hec3;
   std::vector<uint32_t> vrodid32fcalem;
   std::vector<uint32_t> vrodid32fcalhad;
-  std::vector<uint32_t> vrodid32ros; //  for virtual  lar ros in ROBs
-  std::vector<uint32_t> vrodid32tros; // for virtual tile ros in ROBs
 
   TrigRoiDescriptor tmproi(true);
+  std::vector<uint32_t> vrodid32tile;
+  std::vector<IdentifierHash> rIdstile;
   // TTEM
-  m_regionSelector->DetROBIDListUint(TTEM,-1,tmproi,vrodid32em);
+  m_regionSelector_TTEM->ROBIDList(-1,tmproi,vrodid32em);
   // TTHEC
-  m_regionSelector->DetROBIDListUint(TTHEC,0,tmproi,vrodid32hec0);
-  m_regionSelector->DetROBIDListUint(TTHEC,1,tmproi,vrodid32hec1);
-  m_regionSelector->DetROBIDListUint(TTHEC,2,tmproi,vrodid32hec2);
-  m_regionSelector->DetROBIDListUint(TTHEC,3,tmproi,vrodid32hec3);
+  m_regionSelector_TTHEC->ROBIDList(0,tmproi,vrodid32hec0);
+  m_regionSelector_TTHEC->ROBIDList(1,tmproi,vrodid32hec1);
+  m_regionSelector_TTHEC->ROBIDList(2,tmproi,vrodid32hec2);
+  m_regionSelector_TTHEC->ROBIDList(3,tmproi,vrodid32hec3);
   // FCALHAD
-  m_regionSelector->DetROBIDListUint(FCALHAD,-1,tmproi,vrodid32fcalhad);
-  m_regionSelector->DetROBIDListUint(FCALEM,-1,tmproi,vrodid32fcalem);
-  m_regionSelector->DetROBIDListUint(TILE,tmproi,m_vrodid32tile);
-  m_regionSelector->DetHashIDList(TILE,tmproi,m_rIdstile);
+  m_regionSelector_FCALEM->ROBIDList(-1,tmproi,vrodid32fcalem);
+  m_regionSelector_FCALHAD->ROBIDList(-1,tmproi,vrodid32fcalhad);
+  m_regionSelector_TILE->ROBIDList(tmproi,vrodid32tile);
+  m_regionSelector_TILE->HashIDList(tmproi,rIdstile);
+
+  m_vrodid32tile.resize( vrodid32tile.size() );
+  m_rIdstile.resize(rIdstile.size() );
+  // Tile RODs and ID coming from the Tile tables are not unique
+  // iii and iij are local variables helping to clear non-unique IDs
+  auto iii = std::unique_copy(vrodid32tile.begin(),vrodid32tile.end(),m_vrodid32tile.begin());
+  auto iij = std::unique_copy(rIdstile.begin(),rIdstile.end(),m_rIdstile.begin());
+  std::sort( m_vrodid32tile.begin(), iii );
+  std::sort( m_rIdstile.begin(), iij );
+  iii = std::unique_copy(m_vrodid32tile.begin(),iii,m_vrodid32tile.begin());
+  iij = std::unique_copy(m_rIdstile.begin(),iij,m_rIdstile.begin());
+  m_vrodid32tile.resize( std::distance(m_vrodid32tile.begin(), iii) );
+  m_rIdstile.resize( std::distance(m_rIdstile.begin(), iij) );
+
   vrodid32lar.insert(vrodid32lar.end(),vrodid32em.begin(),vrodid32em.end());
   vrodid32hec.insert(vrodid32hec.end(),vrodid32hec0.begin(),vrodid32hec0.end());
   vrodid32lar.insert(vrodid32lar.end(),vrodid32hec.begin(),vrodid32hec.end());
@@ -571,7 +595,14 @@ unsigned int TrigCaloDataAccessSvc::prepareLArCollections( const EventContext& c
   std::vector<const OFFLINE_FRAGMENTS_NAMESPACE::ROBFragment*> robFrags;
   {
     std::lock_guard<std::mutex> dataPrepLock { m_dataPrepMutex };
-    m_regionSelector->DetROBIDListUint( detector, sampling, roi, requestROBs ); // we know that the RegSelSvc is thread safe   
+    switch ( detector ) {
+    case TTEM: {m_regionSelector_TTEM->ROBIDList( sampling, roi, requestROBs ); break; }
+    case TTHEC: {m_regionSelector_TTHEC->ROBIDList( sampling, roi, requestROBs ); break; }
+    case FCALEM: {m_regionSelector_FCALEM->ROBIDList( sampling, roi, requestROBs ); break; }
+    case FCALHAD: {m_regionSelector_FCALHAD->ROBIDList( sampling, roi, requestROBs ); break; }
+    default: break;
+    }
+
     m_robDataProvider->addROBData( context, requestROBs );
     m_robDataProvider->getROBData( context, requestROBs, robFrags );
   }
@@ -609,8 +640,7 @@ unsigned int TrigCaloDataAccessSvc::prepareLArCollections( const EventContext& c
 }
 
 unsigned int TrigCaloDataAccessSvc::prepareTileCollections( const EventContext& context,
-                                                         const IRoiDescriptor& roi,
-                                                         DETID detector ) {
+                                                         const IRoiDescriptor& roi) {
 
   // If the full event was already unpacked, don't need to unpack RoI
   if ( !m_lateInitDone && lateInit() ) {
@@ -624,11 +654,12 @@ unsigned int TrigCaloDataAccessSvc::prepareTileCollections( const EventContext&
   std::vector<IdentifierHash> rIds;
   {
     std::lock_guard<std::mutex> dataPrepLock { m_dataPrepMutex };
-    m_regionSelector->DetROBIDListUint( detector, 0, roi, requestROBs ); // we know that the RegSelSvc is thread safe
-    m_regionSelector->DetHashIDList(detector, roi, rIds);
+    m_regionSelector_TILE->ROBIDList( 0, roi, requestROBs ); // we know that the RegSelSvc is not thread safe
+    m_regionSelector_TILE->HashIDList(roi, rIds);
     m_robDataProvider->addROBData( context, requestROBs );
   }
 
+
   std::lock_guard<std::mutex> collectionLock { cache->mutex };  
   if ( cache->tileContainer->eventNumber() != context.evt() )
      cache->d0cells->clear();
diff --git a/Trigger/TrigAlgorithms/TrigT2CaloCommon/src/TrigCaloDataAccessSvc.h b/Trigger/TrigAlgorithms/TrigT2CaloCommon/src/TrigCaloDataAccessSvc.h
index 73d5e8469087114c3738eaa8d08957011398d46f..c6179d5ac3f24cba4f6e5dd36db39fdbdb5e465b 100644
--- a/Trigger/TrigAlgorithms/TrigT2CaloCommon/src/TrigCaloDataAccessSvc.h
+++ b/Trigger/TrigAlgorithms/TrigT2CaloCommon/src/TrigCaloDataAccessSvc.h
@@ -18,7 +18,7 @@
 #include "TileEvent/TileL2Container.h"
 #include "ByteStreamCnvSvcBase/IROBDataProviderSvc.h"
 #include "IRegionSelector/IRoiDescriptor.h"
-#include "IRegionSelector/IRegSelSvc.h"
+#include "IRegionSelector/IRegSelTool.h"
 #include "TrigT2CaloCommon/ITrigCaloDataAccessSvc.h"
 #include "AthenaMonitoringKernel/GenericMonitoringTool.h"
 #include "StoreGate/ReadHandleKey.h"
@@ -64,7 +64,11 @@ class TrigCaloDataAccessSvc : public extends<AthService, ITrigCaloDataAccessSvc>
   ToolHandle<GenericMonitoringTool> m_monTool{ this, "MonTool", "", "Tool to monitor performance of the service" };
 
   ServiceHandle<IROBDataProviderSvc>  m_robDataProvider{ this, "ROBDataProvider", "ROBDataProviderSvc/ROBDataProviderSvc", ""};
-  ServiceHandle<IRegSelSvc>         m_regionSelector{ this, "RegionSelector", "RegSelSvc/RegSelSvc", ""};
+  ToolHandle<IRegSelTool>           m_regionSelector_TTEM  { this, "RegSelToolEM",  "RegSelTool/RegSelTool_TTEM" };
+  ToolHandle<IRegSelTool>           m_regionSelector_TTHEC  { this, "RegSelToolHEC",  "RegSelTool/RegSelTool_TTHEC" };
+  ToolHandle<IRegSelTool>           m_regionSelector_FCALEM  { this, "RegSelToolFCALEM",  "RegSelTool/RegSelTool_FCALEM" };
+  ToolHandle<IRegSelTool>           m_regionSelector_FCALHAD  { this, "RegSelToolFCALHAD",  "RegSelTool/RegSelTool_FCALHAD" };
+  ToolHandle<IRegSelTool>           m_regionSelector_TILE  { this, "RegSelToolTILE",  "RegSelTool/RegSelTool_TILE" };
   
   Gaudi::Property<bool> m_applyOffsetCorrection { this, "ApplyOffsetCorrection", true, "Enable offset correction" };
 
@@ -151,8 +155,7 @@ class TrigCaloDataAccessSvc : public extends<AthService, ITrigCaloDataAccessSvc>
 				DETID detector );
 
   unsigned int prepareTileCollections( const EventContext& context,
-				const IRoiDescriptor& roi, 
-				DETID detector );
+				const IRoiDescriptor& roi );
 
   unsigned int prepareMBTSCollections( const EventContext& context );
 
diff --git a/Trigger/TrigAlgorithms/TrigT2CaloCommon/src/TrigDataAccess.h b/Trigger/TrigAlgorithms/TrigT2CaloCommon/src/TrigDataAccess.h
index 350f5fa30e27db1b0aafc9e8d65cd8c773071fc8..47272c9d1aff752cc25102ac159ab4400b838aa0 100755
--- a/Trigger/TrigAlgorithms/TrigT2CaloCommon/src/TrigDataAccess.h
+++ b/Trigger/TrigAlgorithms/TrigT2CaloCommon/src/TrigDataAccess.h
@@ -49,6 +49,7 @@
 #include "ZdcRec/ZdcRecChannelTool.h"
 //#include "LumiBlockComps/ILuminosityTool.h"
 
+#include "IRegionSelector/IRegSelSvc.h"
 #include "TrigT2CaloCommon/T2GeometryTool.h"
 #include "TrigT2CaloCommon/T2Calibration.h"
 #include "CaloGeoHelpers/CaloSampling.h"
@@ -66,7 +67,6 @@
 #include "CxxUtils/checker_macros.h"
 ATLAS_NO_CHECK_FILE_THREAD_SAFETY;  // legacy trigger code
 
-class IRegSelSvc;
 // class ITrigRegionSelector;
 class LArRoI_Map;
 class IROBDataProviderSvc;
diff --git a/Trigger/TrigAlgorithms/TrigT2CaloEgamma/python/TrigT2CaloEgammaConfig.py b/Trigger/TrigAlgorithms/TrigT2CaloEgamma/python/TrigT2CaloEgammaConfig.py
index f1cd3641d6278e7f5bfc1c7788dba2d852b1c078..b5a302711f06d858245b4f1624a85cefb0313fb3 100644
--- a/Trigger/TrigAlgorithms/TrigT2CaloEgamma/python/TrigT2CaloEgammaConfig.py
+++ b/Trigger/TrigAlgorithms/TrigT2CaloEgamma/python/TrigT2CaloEgammaConfig.py
@@ -412,21 +412,18 @@ class T2CaloEgamma_ReFastAlgo (CompFactory.T2CaloEgammaReFastAlgo):
             from TrigT2CaloCommon.TrigT2CaloCommonConfig import TrigCaloDataAccessSvc
             svcMgr += TrigCaloDataAccessSvc()
         samp2 = EgammaReSamp2FexConfig(name="ReFaAlgoSamp2FexConfig",
-                                        trigDataAccessMT=svcMgr.TrigCaloDataAccessSvc,
-                                        ExtraInputs=[( 'LArOnOffIdMapping' , 'ConditionStore+LArOnOffIdMap' )])
+                                        trigDataAccessMT=svcMgr.TrigCaloDataAccessSvc)
         samp1 = EgammaReSamp1FexConfig("ReFaAlgoSamp1FexConfig",
-                                        trigDataAccessMT=svcMgr.TrigCaloDataAccessSvc,
-                                        ExtraInputs=[( 'LArOnOffIdMapping' , 'ConditionStore+LArOnOffIdMap' )])
+                                        trigDataAccessMT=svcMgr.TrigCaloDataAccessSvc)
         sampe = EgammaReEmEnFexConfig("ReFaAlgoEmEnFexConfig",
-                                        trigDataAccessMT=svcMgr.TrigCaloDataAccessSvc,
-                                        ExtraInputs=[( 'LArOnOffIdMapping' , 'ConditionStore+LArOnOffIdMap' )])
+                                        trigDataAccessMT=svcMgr.TrigCaloDataAccessSvc)
         samph = EgammaReHadEnFexConfig("ReFaAlgoHadEnFexConfig",
-                                        trigDataAccessMT=svcMgr.TrigCaloDataAccessSvc,
-                                        ExtraInputs=[( 'LArOnOffIdMapping' , 'ConditionStore+LArOnOffIdMap' )])
+                                        trigDataAccessMT=svcMgr.TrigCaloDataAccessSvc)
 
         samph.ExtraInputs=[('TileEMScale','ConditionStore+TileEMScale'),('TileBadChannels','ConditionStore+TileBadChannels')]
 
         self.IReAlgToolList = [ samp2, samp1, sampe, samph ]
+        self.ExtraInputs = [( 'IRegSelLUTCondData' , 'ConditionStore+RegSelLUTCondData_TTEM' ), ( 'IRegSelLUTCondData' , 'ConditionStore+RegSelLUTCondData_TTHEC' ), ( 'IRegSelLUTCondData' , 'ConditionStore+RegSelLUTCondData_TILE' ), ( 'IRegSelLUTCondData' , 'ConditionStore+RegSelLUTCondData_FCALEM' ), ( 'IRegSelLUTCondData' , 'ConditionStore+RegSelLUTCondData_FCALHAD' ) ]
         
         if doRinger:
             from TrigT2CaloEgamma.TrigT2CaloEgammaConfig import RingerReFexConfig
diff --git a/Trigger/TrigAlgorithms/TrigT2CaloEgamma/python/TrigT2CaloEgammaMTConfig.py b/Trigger/TrigAlgorithms/TrigT2CaloEgamma/python/TrigT2CaloEgammaMTConfig.py
index 64ed98ff296c8b0e15c29e184b17a35f5157b93a..fac7fb84f6b7c96da4e7d105e1f9ab868e5ccdca 100644
--- a/Trigger/TrigAlgorithms/TrigT2CaloEgamma/python/TrigT2CaloEgammaMTConfig.py
+++ b/Trigger/TrigAlgorithms/TrigT2CaloEgamma/python/TrigT2CaloEgammaMTConfig.py
@@ -75,6 +75,5 @@ def fastL2EgammaClusteringAlg( flags, roisKey="EMCaloRoIs", doRinger=False):
     alg.CalibListEndcap += [EgammaHitsCalibrationEndcapConfig()]
     alg.CalibListEndcap += [EgammaGapCalibrationConfig()]
 
-
     acc.addEventAlgo( alg )
     return acc
diff --git a/Trigger/TrigValidation/TrigAnalysisTest/share/ref_RDOtoRDOTrig_v1Dev_build.ref b/Trigger/TrigValidation/TrigAnalysisTest/share/ref_RDOtoRDOTrig_v1Dev_build.ref
index 1ce4d677498b729b9de1380e7242bcd68e298bd9..4c7c376624a4a9de9e64b697c700960e10fa1fea 100644
--- a/Trigger/TrigValidation/TrigAnalysisTest/share/ref_RDOtoRDOTrig_v1Dev_build.ref
+++ b/Trigger/TrigValidation/TrigAnalysisTest/share/ref_RDOtoRDOTrig_v1Dev_build.ref
@@ -544,7 +544,7 @@ HLT_JetDS_j0_L1J100:
     2: 3
   stepFeatures:
     0: 137
-    1: 32
+    1: 33
     2: 3
 HLT_alfacalib_AlfaPEB_L1ALFA_ANY:
   eventCount: 0
@@ -1477,7 +1477,7 @@ HLT_j0_vbenfSEP30etSEP34mass35SEP50fbet_L1J20:
   stepCounts:
     0: 15
   stepFeatures:
-    0: 383
+    0: 386
 HLT_j225_subjesgscIS_ftf_bmv2c1040_split_L1J100:
   eventCount: 0
   stepCounts:
@@ -1591,7 +1591,7 @@ HLT_j45_ftf_L1J15:
     1: 19
   stepFeatures:
     0: 20
-    1: 54
+    1: 55
 HLT_j45_ftf_preselj20_L1J20:
   eventCount: 19
   stepCounts:
@@ -1599,7 +1599,7 @@ HLT_j45_ftf_preselj20_L1J20:
     1: 19
   stepFeatures:
     0: 19
-    1: 54
+    1: 55
 HLT_j45_nojcalib_L1J20:
   eventCount: 17
   stepCounts:
@@ -1695,7 +1695,7 @@ HLT_j45_subjesIS_ftf_preselj20_L1J20:
     1: 19
   stepFeatures:
     0: 19
-    1: 49
+    1: 50
 HLT_j45_subjesgscIS_ftf_011jvt_L1J15:
   eventCount: 18
   stepCounts:
@@ -1739,15 +1739,15 @@ HLT_j45_subjesgscIS_ftf_bdl1r70_split_L1J20:
     1: 47
     2: 24
 HLT_j45_subjesgscIS_ftf_bmv2c1070_split_L1J20:
-  eventCount: 15
+  eventCount: 14
   stepCounts:
     0: 19
     1: 19
-    2: 15
+    2: 14
   stepFeatures:
     0: 19
     1: 47
-    2: 27
+    2: 26
 HLT_j45_subjesgscIS_ftf_boffperf_split_L1J20:
   eventCount: 19
   stepCounts:
@@ -1765,7 +1765,7 @@ HLT_j45_subresjesgscIS_ftf_L1J15:
     1: 19
   stepFeatures:
     0: 20
-    1: 54
+    1: 55
 HLT_j460_a10_lcw_subjes_L1J100:
   eventCount: 0
 HLT_j460_a10_lcw_subjes_L1J20:
@@ -1835,13 +1835,13 @@ HLT_j85_ftf_L1J20:
     0: 19
     1: 22
 HLT_j85_pf_ftf_L1J20:
-  eventCount: 13
+  eventCount: 14
   stepCounts:
     0: 19
-    1: 13
+    1: 14
   stepFeatures:
     0: 19
-    1: 22
+    1: 23
 HLT_mb_sptrk_L1RD0_FILLED:
   eventCount: 0
 HLT_mu0_muoncalib_L1MU20:
@@ -2955,13 +2955,13 @@ HLT_xe100_tcpufit_L1XE50:
   stepFeatures:
     0: 6
 HLT_xe100_trkmht_L1XE50:
-  eventCount: 8
+  eventCount: 9
   stepCounts:
     0: 10
-    1: 8
+    1: 9
   stepFeatures:
     0: 10
-    1: 8
+    1: 9
 HLT_xe100_trkmht_xe85_tcpufit_xe65_cell_L1XE50:
   eventCount: 5
   stepCounts: