From 4838e1011f9d12c5fd925c81831e90ecd176eaa4 Mon Sep 17 00:00:00 2001
From: Susumu Oda <susumu.oda@cern.ch>
Date: Thu, 19 Nov 2020 13:06:36 +0100
Subject: [PATCH] Change /SCT/DAQ/Config/Chip to /SCT/DAQ/Config/ChipSlim to
fix ATLASSIM-4975
---
.../share/Rt_override_OFLCOND-MC15c-SDR-11.py | 4 ++--
.../share/Rt_override_OFLCOND-MC16-SDR-23.py | 4 ++--
.../share/Rt_override_OFLCOND-MC16-SDR-26.py | 4 ++--
.../share/Rt_override_OFLCOND-MC16-SDR-26_folders100M.py | 4 ++--
.../share/Rt_override_OFLCOND-MC16-SDR-27.py | 4 ++--
.../InDetRawAlgs/InDetOverlay/python/SCTOverlayConfig.py | 2 +-
Trigger/TriggerCommon/TriggerJobOpts/python/Modifiers.py | 2 +-
7 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/Event/EventOverlay/EventOverlayJobTransforms/share/Rt_override_OFLCOND-MC15c-SDR-11.py b/Event/EventOverlay/EventOverlayJobTransforms/share/Rt_override_OFLCOND-MC15c-SDR-11.py
index f0ebc6b652a..c11cb6e0e0c 100644
--- a/Event/EventOverlay/EventOverlayJobTransforms/share/Rt_override_OFLCOND-MC15c-SDR-11.py
+++ b/Event/EventOverlay/EventOverlayJobTransforms/share/Rt_override_OFLCOND-MC15c-SDR-11.py
@@ -125,8 +125,8 @@ conddb.addFolderWithTag("MUONALIGN_OFL","/MUONALIGN/MDT/ENDCAP/SIDEC","MuonAlign
conddb.addFolderWithTag("MUONALIGN_OFL","/MUONALIGN/TGC/SIDEA","MuonAlignTGCEndCapAAlign-0001-DEFAULT",force=True,forceMC=True,className='CondAttrListCollection')
conddb.addFolderWithTag("MUONALIGN_OFL","/MUONALIGN/TGC/SIDEC","MuonAlignTGCEndCapCAlign-0001-DEFAULT",force=True,forceMC=True,className='CondAttrListCollection')
-conddb.blockFolder("/SCT/DAQ/Config/Chip")
-conddb.addFolderSplitMC("SCT","/SCT/DAQ/Config/Chip","/SCT/DAQ/Config/Chip",force=True,className="CondAttrListVec")
+conddb.blockFolder("/SCT/DAQ/Config/ChipSlim")
+conddb.addFolderSplitMC("SCT","/SCT/DAQ/Config/ChipSlim","/SCT/DAQ/Config/ChipSlim",force=True,className="CondAttrListVec")
conddb.blockFolder("/SCT/DAQ/Config/Module")
conddb.addFolderSplitMC("SCT","/SCT/DAQ/Config/Module","/SCT/DAQ/Config/Module",force=True,className="CondAttrListVec")
diff --git a/Event/EventOverlay/EventOverlayJobTransforms/share/Rt_override_OFLCOND-MC16-SDR-23.py b/Event/EventOverlay/EventOverlayJobTransforms/share/Rt_override_OFLCOND-MC16-SDR-23.py
index acf529239d1..b3151045d17 100644
--- a/Event/EventOverlay/EventOverlayJobTransforms/share/Rt_override_OFLCOND-MC16-SDR-23.py
+++ b/Event/EventOverlay/EventOverlayJobTransforms/share/Rt_override_OFLCOND-MC16-SDR-23.py
@@ -113,8 +113,8 @@ conddb.addFolderWithTag("MUONALIGN_OFL","/MUONALIGN/MDT/ENDCAP/SIDEC","MuonAlign
conddb.addFolderWithTag("MUONALIGN_OFL","/MUONALIGN/TGC/SIDEA","MuonAlignTGCEndCapAAlign-0001-DEFAULT",force=True,forceMC=True,className='CondAttrListCollection')
conddb.addFolderWithTag("MUONALIGN_OFL","/MUONALIGN/TGC/SIDEC","MuonAlignTGCEndCapCAlign-0001-DEFAULT",force=True,forceMC=True,className='CondAttrListCollection')
-conddb.blockFolder("/SCT/DAQ/Config/Chip")
-conddb.addFolderSplitMC("SCT","/SCT/DAQ/Config/Chip","/SCT/DAQ/Config/Chip",force=True,className="CondAttrListVec")
+conddb.blockFolder("/SCT/DAQ/Config/ChipSlim")
+conddb.addFolderSplitMC("SCT","/SCT/DAQ/Config/ChipSlim","/SCT/DAQ/Config/ChipSlim",force=True,className="CondAttrListVec")
conddb.blockFolder("/SCT/DAQ/Config/Module")
conddb.addFolderSplitMC("SCT","/SCT/DAQ/Config/Module","/SCT/DAQ/Config/Module",force=True,className="CondAttrListVec")
diff --git a/Event/EventOverlay/EventOverlayJobTransforms/share/Rt_override_OFLCOND-MC16-SDR-26.py b/Event/EventOverlay/EventOverlayJobTransforms/share/Rt_override_OFLCOND-MC16-SDR-26.py
index 54c3b25854d..75fe998cb29 100644
--- a/Event/EventOverlay/EventOverlayJobTransforms/share/Rt_override_OFLCOND-MC16-SDR-26.py
+++ b/Event/EventOverlay/EventOverlayJobTransforms/share/Rt_override_OFLCOND-MC16-SDR-26.py
@@ -105,8 +105,8 @@ conddb.addFolderWithTag("MUONALIGN_OFL","/MUONALIGN/MDT/ENDCAP/SIDEC","MuonAlign
conddb.addFolderWithTag("MUONALIGN_OFL","/MUONALIGN/TGC/SIDEA","MuonAlignTGCEndCapAAlign-0001-DEFAULT",force=True,forceMC=True,className='CondAttrListCollection')
conddb.addFolderWithTag("MUONALIGN_OFL","/MUONALIGN/TGC/SIDEC","MuonAlignTGCEndCapCAlign-0001-DEFAULT",force=True,forceMC=True,className='CondAttrListCollection')
-conddb.blockFolder("/SCT/DAQ/Config/Chip")
-conddb.addFolderSplitMC("SCT","/SCT/DAQ/Config/Chip","/SCT/DAQ/Config/Chip",force=True,className="CondAttrListVec")
+conddb.blockFolder("/SCT/DAQ/Config/ChipSlim")
+conddb.addFolderSplitMC("SCT","/SCT/DAQ/Config/ChipSlim","/SCT/DAQ/Config/ChipSlim",force=True,className="CondAttrListVec")
conddb.blockFolder("/SCT/DAQ/Config/Module")
conddb.addFolderSplitMC("SCT","/SCT/DAQ/Config/Module","/SCT/DAQ/Config/Module",force=True,className="CondAttrListVec")
diff --git a/Event/EventOverlay/EventOverlayJobTransforms/share/Rt_override_OFLCOND-MC16-SDR-26_folders100M.py b/Event/EventOverlay/EventOverlayJobTransforms/share/Rt_override_OFLCOND-MC16-SDR-26_folders100M.py
index 40622f6a7e9..4c8667b36c6 100644
--- a/Event/EventOverlay/EventOverlayJobTransforms/share/Rt_override_OFLCOND-MC16-SDR-26_folders100M.py
+++ b/Event/EventOverlay/EventOverlayJobTransforms/share/Rt_override_OFLCOND-MC16-SDR-26_folders100M.py
@@ -103,8 +103,8 @@ conddb.addFolderWithTag("MUONALIGN_OFL","/MUONALIGN/MDT/ENDCAP/SIDEC","MuonAlign
conddb.addFolderWithTag("MUONALIGN_OFL","/MUONALIGN/TGC/SIDEA","MuonAlignTGCEndCapAAlign-0001-DEFAULT",force=True,forceMC=True,className='CondAttrListCollection')
conddb.addFolderWithTag("MUONALIGN_OFL","/MUONALIGN/TGC/SIDEC","MuonAlignTGCEndCapCAlign-0001-DEFAULT",force=True,forceMC=True,className='CondAttrListCollection')
-conddb.blockFolder("/SCT/DAQ/Config/Chip")
-conddb.addFolderSplitMC("SCT","/SCT/DAQ/Config/Chip","/SCT/DAQ/Config/Chip",force=True,className="CondAttrListVec")
+conddb.blockFolder("/SCT/DAQ/Config/ChipSlim")
+conddb.addFolderSplitMC("SCT","/SCT/DAQ/Config/ChipSlim","/SCT/DAQ/Config/ChipSlim",force=True,className="CondAttrListVec")
conddb.blockFolder("/SCT/DAQ/Config/Module")
conddb.addFolderSplitMC("SCT","/SCT/DAQ/Config/Module","/SCT/DAQ/Config/Module",force=True,className="CondAttrListVec")
diff --git a/Event/EventOverlay/EventOverlayJobTransforms/share/Rt_override_OFLCOND-MC16-SDR-27.py b/Event/EventOverlay/EventOverlayJobTransforms/share/Rt_override_OFLCOND-MC16-SDR-27.py
index c9d33be0789..0834ff148d4 100644
--- a/Event/EventOverlay/EventOverlayJobTransforms/share/Rt_override_OFLCOND-MC16-SDR-27.py
+++ b/Event/EventOverlay/EventOverlayJobTransforms/share/Rt_override_OFLCOND-MC16-SDR-27.py
@@ -101,8 +101,8 @@ conddb.addFolderWithTag("MUONALIGN_OFL","/MUONALIGN/MDT/ENDCAP/SIDEC","MuonAlign
conddb.addFolderWithTag("MUONALIGN_OFL","/MUONALIGN/TGC/SIDEA","MuonAlignTGCEndCapAAlign-0001-DEFAULT",force=True,forceMC=True,className='CondAttrListCollection')
conddb.addFolderWithTag("MUONALIGN_OFL","/MUONALIGN/TGC/SIDEC","MuonAlignTGCEndCapCAlign-0001-DEFAULT",force=True,forceMC=True,className='CondAttrListCollection')
-conddb.blockFolder("/SCT/DAQ/Config/Chip")
-conddb.addFolderSplitMC("SCT","/SCT/DAQ/Config/Chip","/SCT/DAQ/Config/Chip",force=True,className="CondAttrListVec")
+conddb.blockFolder("/SCT/DAQ/Config/ChipSlim")
+conddb.addFolderSplitMC("SCT","/SCT/DAQ/Config/ChipSlim","/SCT/DAQ/Config/ChipSlim",force=True,className="CondAttrListVec")
conddb.blockFolder("/SCT/DAQ/Config/Module")
conddb.addFolderSplitMC("SCT","/SCT/DAQ/Config/Module","/SCT/DAQ/Config/Module",force=True,className="CondAttrListVec")
diff --git a/InnerDetector/InDetRawAlgs/InDetOverlay/python/SCTOverlayConfig.py b/InnerDetector/InDetRawAlgs/InDetOverlay/python/SCTOverlayConfig.py
index 02ee90618e4..575cdcd38aa 100644
--- a/InnerDetector/InDetRawAlgs/InDetOverlay/python/SCTOverlayConfig.py
+++ b/InnerDetector/InDetRawAlgs/InDetOverlay/python/SCTOverlayConfig.py
@@ -16,7 +16,7 @@ def SCT_ConfigurationConditionsCfg(flags, **kwargs):
SCT_ConfigurationConditionsTool = CompFactory.SCT_ConfigurationConditionsTool
acc.addPublicTool(SCT_ConfigurationConditionsTool())
- channelFolder = "/SCT/DAQ/Config/Chip"
+ channelFolder = "/SCT/DAQ/Config/ChipSlim"
moduleFolder = "/SCT/DAQ/Config/Module"
murFolder = "/SCT/DAQ/Config/MUR"
from IOVDbSvc.IOVDbSvcConfig import addFolders
diff --git a/Trigger/TriggerCommon/TriggerJobOpts/python/Modifiers.py b/Trigger/TriggerCommon/TriggerJobOpts/python/Modifiers.py
index 41ec801614e..f9a8e1cf22b 100644
--- a/Trigger/TriggerCommon/TriggerJobOpts/python/Modifiers.py
+++ b/Trigger/TriggerCommon/TriggerJobOpts/python/Modifiers.py
@@ -372,7 +372,7 @@ class forceConditions(_modifier):
# All time-based folders (from IOVDbSvc DEBUG message, see athena!38274)
timebased = ['/TDAQ/OLC/CALIBRATIONS',
'/TDAQ/Resources/ATLAS/SCT/Robins',
- '/SCT/DAQ/Config/Chip',
+ '/SCT/DAQ/Config/ChipSlim',
'/SCT/DAQ/Config/Geog',
'/SCT/DAQ/Config/MUR',
'/SCT/DAQ/Config/Module',
--
GitLab