diff --git a/InnerDetector/InDetConditions/SCT_ConditionsAlgorithms/share/testConfig.py b/InnerDetector/InDetConditions/SCT_ConditionsAlgorithms/share/testConfig.py
index 894e3b3c388564b09a3ef4e32f8b570506a18d2c..1bc6ec7052bd6b665184774c77241a7682fe7c30 100644
--- a/InnerDetector/InDetConditions/SCT_ConditionsAlgorithms/share/testConfig.py
+++ b/InnerDetector/InDetConditions/SCT_ConditionsAlgorithms/share/testConfig.py
@@ -1,4 +1,5 @@
-test="run2Data"
+test="run2MC"
+useSlim=True
import AthenaCommon.AtlasUnixStandardJob
@@ -176,6 +177,14 @@ elif (test=='run2Data'):
sct_ConfigurationConditionsToolSetup.setModuleFolderDb("/SCT/DAQ/Config/Module")
sct_ConfigurationConditionsToolSetup.setMurFolderDb("/SCT/DAQ/Config/MUR")
+if useSlim:
+ if (test=='run2MC'):
+ sct_ConfigurationConditionsToolSetup.setChannelFolder("/SCT/DAQ/Config/ChipSlim")
+ # conddb.blockFolder("/SCT/DAQ/Config/Chip")
+ # conddb.addFolderWithTag("SCT_OFL","/SCT/DAQ/Config/Chip","SctDaqConfigChip-MC-14",force=True,forceMC=True,className="CondAttrListVec");
+ # conddb.blockFolder("/SCT/DAQ/Config/ChipSlim")
+ conddb.addFolderWithTag("SCT_OFL","/SCT/DAQ/Config/ChipSlim","SctDaqConfigChipSlim-MC-14",force=True,forceMC=True,className="CondAttrListVec");
+
sct_ConfigurationConditionsToolSetup.setup()
from SCT_ConditionsAlgorithms.SCT_ConditionsAlgorithmsConf import SCT_ConfigurationConditionsTestAlg
diff --git a/InnerDetector/InDetConditions/SCT_ConditionsAlgorithms/src/SCT_ConfigurationCondAlg.cxx b/InnerDetector/InDetConditions/SCT_ConditionsAlgorithms/src/SCT_ConfigurationCondAlg.cxx
index f6d5f4bedc1edb869304a34881f1b4aa18b402d3..eb6868c54b8845ed8ebcd0bea0a0ce72122ecccd 100644
--- a/InnerDetector/InDetConditions/SCT_ConditionsAlgorithms/src/SCT_ConfigurationCondAlg.cxx
+++ b/InnerDetector/InDetConditions/SCT_ConditionsAlgorithms/src/SCT_ConfigurationCondAlg.cxx
@@ -19,11 +19,14 @@ const std::string SCT_ConfigurationCondAlg::s_coolChannelFolderName{"/SCT/DAQ/Co
const std::string SCT_ConfigurationCondAlg::s_coolModuleFolderName{"/SCT/DAQ/Configuration/Module"};
const std::string SCT_ConfigurationCondAlg::s_coolMurFolderName{"/SCT/DAQ/Configuration/MUR"};
-//Run2: folders change name in CONDBR2 database
+// Run2: folders change names
const std::string SCT_ConfigurationCondAlg::s_coolChannelFolderName2{"/SCT/DAQ/Config/Chip"};
const std::string SCT_ConfigurationCondAlg::s_coolModuleFolderName2{"/SCT/DAQ/Config/Module"};
const std::string SCT_ConfigurationCondAlg::s_coolMurFolderName2{"/SCT/DAQ/Config/MUR"};
+// New slimmed channel folder
+const std::string SCT_ConfigurationCondAlg::s_coolChannelFolderName2Slim{"/SCT/DAQ/Config/ChipSlim"};
+
SCT_ConfigurationCondAlg::SCT_ConfigurationCondAlg(const std::string& name, ISvcLocator* pSvcLocator)
: ::AthReentrantAlgorithm(name, pSvcLocator)
{
@@ -40,7 +43,9 @@ StatusCode SCT_ConfigurationCondAlg::initialize() {
ATH_CHECK(detStore()->retrieve(m_pHelper, "SCT_ID"));
// Check conditions folder names
- if ((m_readKeyChannel.key()!=s_coolChannelFolderName) and (m_readKeyChannel.key()!=s_coolChannelFolderName2)) {
+ if ((m_readKeyChannel.key()!=s_coolChannelFolderName) and
+ (m_readKeyChannel.key()!=s_coolChannelFolderName2) and
+ (m_readKeyChannel.key()!=s_coolChannelFolderName2Slim)) {
ATH_MSG_FATAL(m_readKeyChannel.key() << " is incorrect.");
return StatusCode::FAILURE;
}
@@ -124,6 +129,7 @@ StatusCode SCT_ConfigurationCondAlg::fillChannelData(SCT_ConfigurationCondData*
unsigned int nDisabledStripsExclusive{0};
const std::string channelFolderName{m_readKeyChannel.key()};
const bool run1{channelFolderName==s_coolChannelFolderName};
+ const bool slim{channelFolderName==s_coolChannelFolderName2Slim};
// indices change according to whether CoraCool or CoolVectorPayload
enum RUN1_MODULE_INDICES{PK, FOREIGN_KEY, CRATE_1, ROD_1, CHANNEL_1,OUTPUTCURRENT_1,
@@ -138,12 +144,14 @@ StatusCode SCT_ConfigurationCondAlg::fillChannelData(SCT_ConfigurationCondData*
enum RUN2_CHIP_INDICES{CHIP_2, ACTIVE_2, ADDRESS_2, CONFIG_2, MASK0_2,MASK1_2,MASK2_2,
MASK3_2, VTHR_2, VCAL_2, DELAY_2, PREAMP_2, SHAPER_2, RC_FUNCTION_2, RC_ARGS_2,
C_FACTOR_2, TARGET_2, TRIM_2};
- const unsigned int chipIndex{ run1 ? static_cast<unsigned int>(CHIP_1) : static_cast<unsigned int>(CHIP_2)};
- const unsigned int configIndex{run1 ? static_cast<unsigned int>(CONFIG_1) : static_cast<unsigned int>(CONFIG_2)};
- const unsigned int mask0Index{ run1 ? static_cast<unsigned int>(MASK0_1) : static_cast<unsigned int>(MASK0_2)};
- const unsigned int mask1Index{ run1 ? static_cast<unsigned int>(MASK1_1) : static_cast<unsigned int>(MASK1_2)};
- const unsigned int mask2Index{ run1 ? static_cast<unsigned int>(MASK2_1) : static_cast<unsigned int>(MASK2_2)};
- const unsigned int mask3Index{ run1 ? static_cast<unsigned int>(MASK3_1) : static_cast<unsigned int>(MASK3_2)};
+ enum RUN2_CHIPSLIM_INDICES{CHIP_2_SLIM, CONFIG_2_SLIM, MASK0_2_SLIM, MASK1_2_SLIM, MASK2_2_SLIM,
+ MASK3_2_SLIM};
+ const unsigned int chipIndex{ run1 ? static_cast<unsigned int>(CHIP_1) : slim ? static_cast<unsigned int>(CHIP_2_SLIM) : static_cast<unsigned int>(CHIP_2)};
+ const unsigned int configIndex{run1 ? static_cast<unsigned int>(CONFIG_1) : slim ? static_cast<unsigned int>(CONFIG_2_SLIM) : static_cast<unsigned int>(CONFIG_2)};
+ const unsigned int mask0Index{ run1 ? static_cast<unsigned int>(MASK0_1) : slim ? static_cast<unsigned int>(MASK0_2_SLIM) : static_cast<unsigned int>(MASK0_2)};
+ const unsigned int mask1Index{ run1 ? static_cast<unsigned int>(MASK1_1) : slim ? static_cast<unsigned int>(MASK1_2_SLIM) : static_cast<unsigned int>(MASK1_2)};
+ const unsigned int mask2Index{ run1 ? static_cast<unsigned int>(MASK2_1) : slim ? static_cast<unsigned int>(MASK2_2_SLIM) : static_cast<unsigned int>(MASK2_2)};
+ const unsigned int mask3Index{ run1 ? static_cast<unsigned int>(MASK3_1) : slim ? static_cast<unsigned int>(MASK3_2_SLIM) : static_cast<unsigned int>(MASK3_2)};
// Clear previous information at callback
writeCdo->clearBadStripIds();
diff --git a/InnerDetector/InDetConditions/SCT_ConditionsAlgorithms/src/SCT_ConfigurationCondAlg.h b/InnerDetector/InDetConditions/SCT_ConditionsAlgorithms/src/SCT_ConfigurationCondAlg.h
index f1b69efeab47e992a7c39fa4140f62b3b07d4d67..c5c50bd583e1ef3aec6d5bdefcaa8237f89ddcfc 100644
--- a/InnerDetector/InDetConditions/SCT_ConditionsAlgorithms/src/SCT_ConfigurationCondAlg.h
+++ b/InnerDetector/InDetConditions/SCT_ConditionsAlgorithms/src/SCT_ConfigurationCondAlg.h
@@ -50,6 +50,7 @@ class SCT_ConfigurationCondAlg : public AthReentrantAlgorithm
static const std::string s_coolChannelFolderName;
static const std::string s_coolChannelFolderName2;
+ static const std::string s_coolChannelFolderName2Slim;
static const std::string s_coolModuleFolderName;
static const std::string s_coolModuleFolderName2;
static const std::string s_coolMurFolderName;
diff --git a/InnerDetector/InDetConfig/python/InDetRecToolConfig.py b/InnerDetector/InDetConfig/python/InDetRecToolConfig.py
index 08ed16b2ed400dabc28adbf6ea26e0495e48e6ad..d8a4dcdec1f2060190f6f661a2a5331991ce1acd 100644
--- a/InnerDetector/InDetConfig/python/InDetRecToolConfig.py
+++ b/InnerDetector/InDetConfig/python/InDetRecToolConfig.py
@@ -152,7 +152,7 @@ def InDetSCT_ConditionsSummaryToolCfg(flags, name = "InDetSCT_ConditionsSummaryT
print ('*** SCT DB CONFIGURATION FLAG CONFLICT: Both CVP and CoraCool selected****')
SCTConfigurationFolderPath=''
- cond_kwargs={"ChannelFolder" : SCTConfigurationFolderPath+"Chip",
+ cond_kwargs={"ChannelFolder" : SCTConfigurationFolderPath+("ChipSlim" if flags.Input.isMC else "Chip"),
"ModuleFolder" : SCTConfigurationFolderPath+"Module",
"MurFolder" : SCTConfigurationFolderPath+"MUR"}
cfgCondToolAcc = SCT_ConfigurationConditionsToolCfg(flags,name, cond_kwargs=cond_kwargs)
@@ -243,7 +243,7 @@ def InDetSCT_ConditionsSummaryToolCfg(flags, name = "InDetSCT_ConditionsSummaryT
return result
def SCT_ConfigurationConditionsToolCfg(flags, name="SCT_ConfigurationConditionsTool", cond_kwargs={}, **kwargs):
- cond_kwargs.setdefault("ChannelFolder","/SCT/DAQ/Config/Chip")
+ cond_kwargs.setdefault("ChannelFolder", "/SCT/DAQ/Config/ChipSlim" if flags.Input.isMC else "/SCT/DAQ/Config/Chip")
cond_kwargs.setdefault("ModuleFolder","/SCT/DAQ/Config/Module")
cond_kwargs.setdefault("MurFolder","/SCT/DAQ/Config/MUR")
cond_kwargs.setdefault("dbInstance","SCT")
@@ -299,14 +299,15 @@ def getSCTDAQConfigFolder(flags) :
def SCT_ConfigurationCondAlgCfg(flags, name="SCT_ConfigurationCondAlg", **kwargs):
result = ComponentAccumulator()
config_folder_prefix = getSCTDAQConfigFolder(flags)
- kwargs.setdefault("ReadKeyChannel", config_folder_prefix+"Chip")
+ channelFolder = config_folder_prefix+("ChipSlim" if flags.Input.isMC else "Chip")
+ kwargs.setdefault("ReadKeyChannel", channelFolder)
kwargs.setdefault("ReadKeyModule", config_folder_prefix+"Module")
kwargs.setdefault("ReadKeyMur", config_folder_prefix+"MUR")
result.merge(addFoldersSplitOnline(flags,
detDb="SCT",
- online_folders=config_folder_prefix+"Chip",
- offline_folders=config_folder_prefix+"Chip",
+ online_folders=channelFolder,
+ offline_folders=channelFolder,
className='CondAttrListVec',
splitMC=True))
result.merge(addFoldersSplitOnline(flags,
diff --git a/InnerDetector/InDetConfig/python/TrackRecoConfig.py b/InnerDetector/InDetConfig/python/TrackRecoConfig.py
index c7c7fa1734e70ed7ce8f94f1b867a79d69498722..a662fad4fa84cbe99292608329bfede22944ebbe 100644
--- a/InnerDetector/InDetConfig/python/TrackRecoConfig.py
+++ b/InnerDetector/InDetConfig/python/TrackRecoConfig.py
@@ -149,11 +149,6 @@ def MergedPixelsToolCfg(flags, **kwargs) :
kwargs.setdefault("PixelConditionsSummaryTool", conditionssummarytool )
acc.merge(accbuf)
- kwargs.setdefault("MinimalSplitSize", 0 )
- kwargs.setdefault("MaximalSplitSize", 49 )
- kwargs.setdefault("MinimalSplitProbability", 0 )
- kwargs.setdefault("DoIBLSplitting", True )
-
# Enable duplcated RDO check for data15 because duplication mechanism was used.
if len(flags.Input.ProjectName)>=6 and flags.Input.ProjectName[:6]=="data15":
kwargs.setdefault("CheckDuplicatedRDO", True )
diff --git a/InnerDetector/InDetExample/InDetRecExample/share/InDetRecConditionsAccess.py b/InnerDetector/InDetExample/InDetRecExample/share/InDetRecConditionsAccess.py
index ed37fd74e2f838ab6dc119fa7a8f79ca972b659f..c6282395efc33255c797523da3043f3e15f9bf29 100644
--- a/InnerDetector/InDetExample/InDetRecExample/share/InDetRecConditionsAccess.py
+++ b/InnerDetector/InDetExample/InDetRecExample/share/InDetRecConditionsAccess.py
@@ -271,7 +271,10 @@ if DetFlags.haveRIO.SCT_on():
pass
from SCT_ConditionsTools.SCT_ConfigurationConditionsToolSetup import SCT_ConfigurationConditionsToolSetup
sct_ConfigurationConditionsToolSetup = SCT_ConfigurationConditionsToolSetup()
- sct_ConfigurationConditionsToolSetup.setChannelFolder(SCTConfigurationFolderPath+"Chip")
+ if globalflags.DataSource() == "data":
+ sct_ConfigurationConditionsToolSetup.setChannelFolder(SCTConfigurationFolderPath+"Chip")
+ else:
+ sct_ConfigurationConditionsToolSetup.setChannelFolder(SCTConfigurationFolderPath+"ChipSlim") # For MC (OFLP200)
sct_ConfigurationConditionsToolSetup.setModuleFolder(SCTConfigurationFolderPath+"Module")
sct_ConfigurationConditionsToolSetup.setMurFolder(SCTConfigurationFolderPath+"MUR")
sct_ConfigurationConditionsToolSetup.setup()
diff --git a/InnerDetector/InDetExample/InDetTrigRecExample/python/InDetTrigConfigConditions.py b/InnerDetector/InDetExample/InDetTrigRecExample/python/InDetTrigConfigConditions.py
index 1ff103dde5d954a21722ced454c7e3ffb7f21d3c..56fda0c7da43b7aced1c9c26ae36572bc389fe37 100644
--- a/InnerDetector/InDetExample/InDetTrigRecExample/python/InDetTrigConfigConditions.py
+++ b/InnerDetector/InDetExample/InDetTrigRecExample/python/InDetTrigConfigConditions.py
@@ -434,7 +434,11 @@ class SCT_ConditionsToolsSetup:
from SCT_ConditionsTools.SCT_ConfigurationConditionsToolSetup import SCT_ConfigurationConditionsToolSetup
sct_ConfigurationConditionsToolSetup = SCT_ConfigurationConditionsToolSetup()
- sct_ConfigurationConditionsToolSetup.setChannelFolder(sctdaqpath+"/Chip")
+ from AthenaCommon.GlobalFlags import globalflags
+ if (globalflags.DataSource() == 'data'):
+ sct_ConfigurationConditionsToolSetup.setChannelFolder(sctdaqpath+"/Chip")
+ else:
+ sct_ConfigurationConditionsToolSetup.setChannelFolder(sctdaqpath+"/ChipSlim") # For MC (OFLP200)
sct_ConfigurationConditionsToolSetup.setModuleFolder(sctdaqpath+"/Module")
sct_ConfigurationConditionsToolSetup.setMurFolder(sctdaqpath+"/MUR")
sct_ConfigurationConditionsToolSetup.setToolName(instanceName)
diff --git a/Trigger/TrigTools/TrigInDetConfig/python/InDetSetup.py b/Trigger/TrigTools/TrigInDetConfig/python/InDetSetup.py
index d9435b93c60b6377651bdb0504e8925798b7e343..a165ce7801dbd975ab654f31a3bf088b9b2a4d92 100644
--- a/Trigger/TrigTools/TrigInDetConfig/python/InDetSetup.py
+++ b/Trigger/TrigTools/TrigInDetConfig/python/InDetSetup.py
@@ -208,6 +208,8 @@ def makeInDetAlgs( whichSignature='', separateTrackParticleCreator='', rois = 'E
from SCT_ConditionsTools.SCT_ConfigurationConditionsToolSetup import SCT_ConfigurationConditionsToolSetup
sct_ConfigurationConditionsToolSetup = SCT_ConfigurationConditionsToolSetup()
sct_ConfigurationConditionsToolSetup.setToolName("InDetSCT_ConfigurationConditionsTool_" + signature)
+ if globalflags.DataSource() == 'geant4':
+ sct_ConfigurationConditionsToolSetup.setChannelFolder("/SCT/DAQ/Config/ChipSlim") # For MC (OFLP200)
sct_ConfigurationConditionsToolSetup.setup()
InDetSCT_ConditionsSummaryToolWithoutFlagged.ConditionsTools.append(sct_ConfigurationConditionsToolSetup.getTool().getFullName())
diff --git a/Trigger/TrigTools/TrigInDetConfig/python/TrigInDetConfig.py b/Trigger/TrigTools/TrigInDetConfig/python/TrigInDetConfig.py
index 3ab4ba75c9c98acb90a864b75fdfc7c899e0b076..df2baf5614e04eb12a9af4894109257f2bb6a1b6 100644
--- a/Trigger/TrigTools/TrigInDetConfig/python/TrigInDetConfig.py
+++ b/Trigger/TrigTools/TrigInDetConfig/python/TrigInDetConfig.py
@@ -67,7 +67,7 @@ def TrigInDetCondConfig( flags ):
acc.merge(SCT_CablingCondAlgCfg(flags))
SCT_ConfigurationConditionsTool=CompFactory.SCT_ConfigurationConditionsTool
acc.addPublicTool(SCT_ConfigurationConditionsTool())
- channelFolder = "/SCT/DAQ/Config/Chip"
+ channelFolder = "/SCT/DAQ/Config/ChipSlim" if flags.Input.isMC else "/SCT/DAQ/Config/Chip"
moduleFolder = "/SCT/DAQ/Config/Module"
murFolder = "/SCT/DAQ/Config/MUR"
SCT_ConfigurationCondAlg=CompFactory.SCT_ConfigurationCondAlg
diff --git a/Trigger/TrigValidation/TrigAnalysisTest/share/ref_RDOtoRDOTrig_mt1_build.ref b/Trigger/TrigValidation/TrigAnalysisTest/share/ref_RDOtoRDOTrig_mt1_build.ref
index 16482c911b38149e9c12ae6242ec1238b93cad54..24e87294076bbb5eb79c82d00111becfd620f8f1 100644
--- a/Trigger/TrigValidation/TrigAnalysisTest/share/ref_RDOtoRDOTrig_mt1_build.ref
+++ b/Trigger/TrigValidation/TrigAnalysisTest/share/ref_RDOtoRDOTrig_mt1_build.ref
@@ -9,7 +9,7 @@ TrigSignatureMoniMT INFO -- #1767768251 Events
TrigSignatureMoniMT INFO -- #1767768251 Features 0 0 0 0 - - - - - - - -
TrigSignatureMoniMT INFO HLT_2e3_etcut_L12EM3 #2613484113
TrigSignatureMoniMT INFO -- #2613484113 Events 20 20 20 20 20 - - - - - - - - - 20
-TrigSignatureMoniMT INFO -- #2613484113 Features 342 3686 780 - - - - - - - - -
+TrigSignatureMoniMT INFO -- #2613484113 Features 342 3678 780 - - - - - - - - -
TrigSignatureMoniMT INFO HLT_2g20_tight_L12EM15VH #3837353071
TrigSignatureMoniMT INFO -- #3837353071 Events 2 2 0 0 0 0 - - - - - - - - 0
TrigSignatureMoniMT INFO -- #3837353071 Features 0 0 0 0 - - - - - - - -
@@ -132,22 +132,22 @@ TrigSignatureMoniMT INFO -- #1745513164 Events
TrigSignatureMoniMT INFO -- #1745513164 Features 55 55 55 - - - - - - - - -
TrigSignatureMoniMT INFO HLT_e3_etcut_L1EM3 #683953566
TrigSignatureMoniMT INFO -- #683953566 Events 20 20 20 20 20 - - - - - - - - - 20
-TrigSignatureMoniMT INFO -- #683953566 Features 171 1843 390 - - - - - - - - -
+TrigSignatureMoniMT INFO -- #683953566 Features 171 1839 390 - - - - - - - - -
TrigSignatureMoniMT INFO HLT_e5_etcut_L1EM3 #324908483
TrigSignatureMoniMT INFO -- #324908483 Events 20 20 20 20 20 - - - - - - - - - 20
-TrigSignatureMoniMT INFO -- #324908483 Features 137 1654 190 - - - - - - - - -
+TrigSignatureMoniMT INFO -- #324908483 Features 137 1652 190 - - - - - - - - -
TrigSignatureMoniMT INFO HLT_e5_lhloose_L1EM3 #736648247
TrigSignatureMoniMT INFO -- #736648247 Events 20 20 18 18 18 5 - - - - - - - - 5
TrigSignatureMoniMT INFO -- #736648247 Features 54 586 109 6 - - - - - - - -
TrigSignatureMoniMT INFO HLT_e5_lhloose_noringer_L1EM3 #1053337356
TrigSignatureMoniMT INFO -- #1053337356 Events 20 20 17 17 17 4 - - - - - - - - 4
-TrigSignatureMoniMT INFO -- #1053337356 Features 56 651 116 5 - - - - - - - -
+TrigSignatureMoniMT INFO -- #1053337356 Features 56 652 116 5 - - - - - - - -
TrigSignatureMoniMT INFO HLT_e5_lhmedium_L1EM3 #2713915187
TrigSignatureMoniMT INFO -- #2713915187 Events 20 20 18 18 18 5 - - - - - - - - 5
TrigSignatureMoniMT INFO -- #2713915187 Features 53 581 106 6 - - - - - - - -
TrigSignatureMoniMT INFO HLT_e5_lhmedium_noringer_L1EM3 #176627878
TrigSignatureMoniMT INFO -- #176627878 Events 20 20 16 16 16 4 - - - - - - - - 4
-TrigSignatureMoniMT INFO -- #176627878 Features 48 531 93 5 - - - - - - - -
+TrigSignatureMoniMT INFO -- #176627878 Features 48 532 93 5 - - - - - - - -
TrigSignatureMoniMT INFO HLT_e5_lhtight_L1EM3 #2070133824
TrigSignatureMoniMT INFO -- #2070133824 Events 20 20 18 18 18 4 - - - - - - - - 4
TrigSignatureMoniMT INFO -- #2070133824 Features 51 562 101 5 - - - - - - - -
@@ -156,10 +156,10 @@ TrigSignatureMoniMT INFO -- #3303895627 Events
TrigSignatureMoniMT INFO -- #3303895627 Features 51 562 101 5 - - - - - - - -
TrigSignatureMoniMT INFO HLT_e5_lhtight_noringer_L1EM3 #2758326765
TrigSignatureMoniMT INFO -- #2758326765 Events 20 20 16 16 16 4 - - - - - - - - 4
-TrigSignatureMoniMT INFO -- #2758326765 Features 45 513 84 5 - - - - - - - -
+TrigSignatureMoniMT INFO -- #2758326765 Features 45 514 84 5 - - - - - - - -
TrigSignatureMoniMT INFO HLT_e5_lhtight_noringer_nod0_L1EM3 #1690619419
TrigSignatureMoniMT INFO -- #1690619419 Events 20 20 16 16 16 4 - - - - - - - - 4
-TrigSignatureMoniMT INFO -- #1690619419 Features 45 513 84 5 - - - - - - - -
+TrigSignatureMoniMT INFO -- #1690619419 Features 45 514 84 5 - - - - - - - -
TrigSignatureMoniMT INFO HLT_e60_lhmedium_L1EM22VHI #298591874
TrigSignatureMoniMT INFO -- #298591874 Events 6 6 2 2 2 2 - - - - - - - - 2
TrigSignatureMoniMT INFO -- #298591874 Features 2 33 4 2 - - - - - - - -
@@ -168,7 +168,7 @@ TrigSignatureMoniMT INFO -- #4115486024 Events
TrigSignatureMoniMT INFO -- #4115486024 Features 2 33 4 2 - - - - - - - -
TrigSignatureMoniMT INFO HLT_e7_etcut_L1EM3 #1959043579
TrigSignatureMoniMT INFO -- #1959043579 Events 20 20 20 20 20 - - - - - - - - - 20
-TrigSignatureMoniMT INFO -- #1959043579 Features 89 1135 112 - - - - - - - - -
+TrigSignatureMoniMT INFO -- #1959043579 Features 89 1132 112 - - - - - - - - -
TrigSignatureMoniMT INFO HLT_e7_lhmedium_mu24_L1MU20 #2970063918
TrigSignatureMoniMT INFO -- #2970063918 Events 8 8 7 7 7 2 2 1 1 1 - - - - 1
TrigSignatureMoniMT INFO -- #2970063918 Features 9 92 17 2 2 1 1 1 - - - -