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Paris Moschovakos
atlas-nsw-vmmBoards-firmware
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Created date
Changes to accomodate periodic soft reset.
!7
· created
Sep 14, 2016
by
Paris Moschovakos
Merged
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0
updated
Sep 14, 2016
Changes that are up-to-date with master complete
!6
· created
Sep 05, 2016
by
Christos Bakalis
Merged
Approved
0
updated
Sep 05, 2016
Reset input signal change finally implemented
!5
· created
Aug 10, 2016
by
Christos Bakalis
Merged
Approved
0
updated
Aug 10, 2016
Changed the FIFO2UDP rstFIFO input signals (swapped rstDAQFIFO <--> daqFIFO_reset)
!4
· created
Aug 10, 2016
by
Christos Bakalis
Merged
Approved
0
updated
Aug 10, 2016
Changed the rstFIFO input of FIFO2UDP
!3
· created
Aug 10, 2016
by
Christos Bakalis
Merged
Approved
1
updated
Aug 10, 2016
Changed the rstFIFO input of FIFO2UDP
!2
· created
Aug 10, 2016
by
Christos Bakalis
Closed
1 left
0
updated
Aug 10, 2016
Revert "WARNING: speed grade in the .tcl changed from -3 to -2 (which is the correct one)."
!1
· created
Aug 02, 2016
by
Reid Pinkham
Merged
Approved
0
updated
Aug 02, 2016
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