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Commit 895502e8 authored by Fabio Ravera's avatar Fabio Ravera
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Merge branch 'chipContainer' into 'Dev' 

Monitoring + IT periodic merge

See merge request cms_tk_ph2/Ph2_ACF!173
parents d9348e64 631d37ac
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DQMUtils/RD53GainOptimizationHistograms.cc
View file @ 895502e8
......@@ -16,7 +16,7 @@ void GainOptimizationHistograms::book(TFile* theOutputFile, const DetectorContai
{
ContainerFactory::copyStructure(theDetectorStructure, DetectorData);
uint16_t rangeKrumCurr = RD53Shared::setBits(static_cast<RD53*>(theDetectorStructure.at(0)->at(0)->at(0)->at(0))->getNumberOfBits("KRUM_CURR_LIN")) + 1;
const uint16_t rangeKrumCurr = RD53Shared::setBits(static_cast<RD53*>(theDetectorStructure.at(0)->at(0)->at(0)->at(0))->getNumberOfBits("KRUM_CURR_LIN")) + 1;
auto hKrumCurr = CanvasContainer<TH1F>("KrumCurr", "KrumCurr", rangeKrumCurr, 0, rangeKrumCurr);
bookImplementer(theOutputFile, theDetectorStructure, KrumCurr, hKrumCurr, "Krummenacher Current", "Entries");
......
DQMUtils/RD53PhysicsHistograms.cc
View file @ 895502e8
......@@ -15,9 +15,9 @@ void PhysicsHistograms::book(TFile* theOutputFile, const DetectorContainer& theD
{
ContainerFactory::copyStructure(theDetectorStructure, DetectorData);
size_t ToTsize = RD53Shared::setBits(RD53EvtEncoder::NBIT_TOT / RD53Constants::NPIX_REGION) + 1;
size_t BCIDsize = RD53Shared::setBits(RD53EvtEncoder::NBIT_BCID) + 1;
size_t TrgIDsize = RD53Shared::setBits(RD53EvtEncoder::NBIT_TRIGID) + 1;
const size_t ToTsize = RD53Shared::setBits(RD53EvtEncoder::NBIT_TOT / RD53Constants::NPIX_REGION) + 1;
const size_t BCIDsize = RD53Shared::setBits(RD53EvtEncoder::NBIT_BCID) + 1;
const size_t TrgIDsize = RD53Shared::setBits(RD53EvtEncoder::NBIT_TRIGID) + 1;
auto hToT1D = CanvasContainer<TH1F>("ToT1D", "ToT Distribution", ToTsize, 0, ToTsize);
bookImplementer(theOutputFile, theDetectorStructure, ToT1D, hToT1D, "ToT", "Entries");
......
DQMUtils/RD53PixelAliveHistograms.cc
View file @ 895502e8
......@@ -16,12 +16,16 @@ void PixelAliveHistograms::book(TFile* theOutputFile, const DetectorContainer& t
{
ContainerFactory::copyStructure(theDetectorStructure, DetectorData);
size_t ToTsize = RD53Shared::setBits(RD53EvtEncoder::NBIT_TOT / RD53Constants::NPIX_REGION) + 1;
size_t BCIDsize = RD53Shared::setBits(RD53EvtEncoder::NBIT_BCID) + 1;
size_t TrgIDsize = RD53Shared::setBits(RD53EvtEncoder::NBIT_TRIGID) + 1;
// #######################
// # Retrieve parameters #
// #######################
nEvents = this->findValueInSettings(settingsMap, "nEvents");
const size_t ToTsize = RD53Shared::setBits(RD53EvtEncoder::NBIT_TOT / RD53Constants::NPIX_REGION) + 1;
const size_t BCIDsize = RD53Shared::setBits(RD53EvtEncoder::NBIT_BCID) + 1;
const size_t TrgIDsize = RD53Shared::setBits(RD53EvtEncoder::NBIT_TRIGID) + 1;
auto hOcc1D = CanvasContainer<TH1F>("Occ1D", "Occ1D", 200 + 1, 0, 1 + 1. / 200);
bookImplementer(theOutputFile, theDetectorStructure, Occupancy1D, hOcc1D, "Number of hits", "Entries");
auto hOcc1D = CanvasContainer<TH1F>("Occ1D", "Occ1D", nEvents + 1, 0, 1 + 1. / nEvents);
bookImplementer(theOutputFile, theDetectorStructure, Occupancy1D, hOcc1D, "Efficiency", "Entries");
auto hOcc2D = CanvasContainer<TH2F>("PixelAlive", "Pixel Alive", RD53::nCols, 0, RD53::nCols, RD53::nRows, 0, RD53::nRows);
bookImplementer(theOutputFile, theDetectorStructure, Occupancy2D, hOcc2D, "Columns", "Rows");
......@@ -93,9 +97,9 @@ void PixelAliveHistograms::fill(const DetectorDataContainer& DataContainer)
for(auto row = 0u; row < RD53::nRows; row++)
for(auto col = 0u; col < RD53::nCols; col++)
{
if(cChip->getChannel<OccupancyAndPh>(row, col).fOccupancy != 0)
if(cChip->getChannel<OccupancyAndPh>(row, col).fOccupancy != RD53Shared::ISDISABLED)
{
Occupancy1DHist->Fill(cChip->getChannel<OccupancyAndPh>(row, col).fOccupancy);
Occupancy1DHist->Fill(cChip->getChannel<OccupancyAndPh>(row, col).fOccupancy + Occupancy1DHist->GetBinWidth(0) / 2);
Occupancy2DHist->SetBinContent(col + 1, row + 1, cChip->getChannel<OccupancyAndPh>(row, col).fOccupancy);
ToTHist->Fill(cChip->getChannel<OccupancyAndPh>(row, col).fPh);
}
......
DQMUtils/RD53PixelAliveHistograms.h
View file @ 895502e8
......@@ -40,6 +40,8 @@ class PixelAliveHistograms : public DQMHistogramBase
DetectorDataContainer ToT;
DetectorDataContainer BCID;
DetectorDataContainer TriggerID;
size_t nEvents;
};
#endif
DQMUtils/RD53SCurveHistograms.cc
View file @ 895502e8
......@@ -25,7 +25,7 @@ void SCurveHistograms::book(TFile* theOutputFile, const DetectorContainer& theDe
stopValue = this->findValueInSettings(settingsMap, "VCalHstop");
offset = this->findValueInSettings(settingsMap, "VCalMED");
auto hOcc2D = CanvasContainer<TH2F>("SCurves", "SCurves", nSteps, startValue - offset, stopValue - offset, nEvents + 1, 0, 1 + 1. / nEvents);
auto hOcc2D = CanvasContainer<TH2F>("SCurves", "SCurves", nSteps, startValue - offset, stopValue - offset, 2 * nEvents + 1, 0, 2 + 1. / nEvents);
bookImplementer(theOutputFile, theDetectorStructure, Occupancy2D, hOcc2D, "#DeltaVCal", "Efficiency");
auto hErrorReadOut2D = CanvasContainer<TH2F>("ReadoutErrors", "Readout Errors", RD53::nCols, 0, RD53::nCols, RD53::nRows, 0, RD53::nRows);
......@@ -90,6 +90,8 @@ void SCurveHistograms::fillOccupancy(const DetectorDataContainer& OccupancyConta
hOcc2D->Fill(DELTA_VCAL, cChip->getChannel<OccupancyAndPh>(row, col).fOccupancy + hOcc2D->GetYaxis()->GetBinWidth(0) / 2.);
if(cChip->getChannel<OccupancyAndPh>(row, col).readoutError == true) ErrorReadOut2DHist->Fill(col + 1, row + 1);
}
hOcc2D->GetYaxis()->SetRangeUser(0, 1 + 1. / nEvents);
}
}
......
DQMUtils/RD53ThrEqualizationHistograms.cc
View file @ 895502e8
......@@ -19,10 +19,14 @@ void ThrEqualizationHistograms::book(TFile* theOutputFile, const DetectorContain
// #######################
// # Retrieve parameters #
// #######################
nEvents = this->findValueInSettings(settingsMap, "nEvents");
nEvents = this->findValueInSettings(settingsMap, "nEvents");
size_t TDACsize = RD53Shared::setBits(RD53Constants::NBIT_TDAC) + 1;
const size_t colStart = this->findValueInSettings(settingsMap, "COLstart");
const size_t colStop = this->findValueInSettings(settingsMap, "COLstop");
frontEnd = RD53::getMajorityFE(colStart, colStop);
if(frontEnd == &RD53::DIFF) TDACsize *= 2;
auto hThrEqualization = CanvasContainer<TH1F>("ThrEqualization", "ThrEqualization", nEvents + 1, 0, 1 + 1. / nEvents);
bookImplementer(theOutputFile, theDetectorStructure, ThrEqualization, hThrEqualization, "Efficiency", "Entries");
......@@ -75,6 +79,7 @@ void ThrEqualizationHistograms::fillOccupancy(const DetectorDataContainer& Occup
void ThrEqualizationHistograms::fillTDAC(const DetectorDataContainer& TDACContainer)
{
size_t TDACsize = RD53Shared::setBits(RD53Constants::NBIT_TDAC) + 1;
if(frontEnd == &RD53::DIFF) TDACsize *= 2;
for(const auto cBoard: TDACContainer)
for(const auto cOpticalGroup: *cBoard)
......
DQMUtils/RD53ThrEqualizationHistograms.h
View file @ 895502e8
......@@ -39,6 +39,8 @@ class ThrEqualizationHistograms : public DQMHistogramBase
size_t nEvents;
size_t VCalHnsteps;
const Ph2_HwDescription::RD53::FrontEnd* frontEnd;
};
#endif
DQMUtils/RD53ThresholdHistograms.cc
View file @ 895502e8
......@@ -16,7 +16,7 @@ void ThresholdHistograms::book(TFile* theOutputFile, const DetectorContainer& th
{
ContainerFactory::copyStructure(theDetectorStructure, DetectorData);
uint16_t rangeThreshold = RD53Shared::setBits(static_cast<RD53*>(theDetectorStructure.at(0)->at(0)->at(0)->at(0))->getNumberOfBits("Vthreshold_LIN")) + 1;
const uint16_t rangeThreshold = RD53Shared::setBits(static_cast<RD53*>(theDetectorStructure.at(0)->at(0)->at(0)->at(0))->getNumberOfBits("Vthreshold_LIN")) + 1;
auto hThrehsold = CanvasContainer<TH1F>("Threhsold", "Threhsold", rangeThreshold, 0, rangeThreshold);
bookImplementer(theOutputFile, theDetectorStructure, Threhsold, hThrehsold, "Threhsold", "Entries");
......
HWDescription/MPA.cc
View file @ 895502e8
......@@ -26,7 +26,7 @@ MPA::MPA(uint8_t pBeId, uint8_t pFMCId, uint8_t pFeId, uint8_t pMPAId, uint8_t p
{
fMaxRegValue = 255;
fChipOriginalMask = new ChannelGroup<1920>;
fPartnerId = pPartnerId;
fPartnerId = pPartnerId;
loadfRegMap(filename);
setFrontEndType(FrontEndType::MPA);
}
......@@ -35,7 +35,7 @@ MPA::MPA(const FrontEndDescription& pFeDesc, uint8_t pMPAId, uint8_t pPartnerId,
{
fMaxRegValue = 255; // 8 bit registers in MPA
fChipOriginalMask = new ChannelGroup<1920>;
fPartnerId = pPartnerId;
fPartnerId = pPartnerId;
loadfRegMap(filename);
setFrontEndType(FrontEndType::MPA);
}
......@@ -103,7 +103,6 @@ void MPA::loadfRegMap(const std::string& filename)
} // end loadfRegMap
void MPA::saveRegMap(const std::string& filename)
{ // start saveRegMap
......
HWDescription/MPA.h
View file @ 895502e8
......@@ -42,9 +42,9 @@ class MPA : public ReadoutChip
using MPARegPair = std::pair<std::string, ChipRegItem>;
uint8_t fPartnerId;
uint8_t getPartid() {return fPartnerId;}
void loadfRegMap(const std::string& filename) override;
void saveRegMap(const std::string& filename) override;
uint8_t getPartid() { return fPartnerId; }
void loadfRegMap(const std::string& filename) override;
void saveRegMap(const std::string& filename) override;
bool isDACLocal(const std::string& dacName) override
{
......@@ -61,13 +61,13 @@ class MPA : public ReadoutChip
return 8;
}
// row, col starts at index 0, global pix number starts at number 1
// row, col starts at index 0, global pix number starts at number 1
std::pair<uint32_t, uint32_t> PNlocal(const uint32_t PN) { return std::pair<uint32_t, uint32_t>((PN+1) / 120 , ((PN+1) % 120) - 2 ); }
std::pair<uint32_t, uint32_t> PNlocal(const uint32_t PN) { return std::pair<uint32_t, uint32_t>((PN + 1) / 120, ((PN + 1) % 120) - 2); }
uint32_t getNumberOfChannels() const override { return NMPACHANNELS; }
uint32_t PNglobal(std::pair<uint32_t, uint32_t> PC) { return (PC.first) * 120 + (PC.second) +1; }
uint32_t PNglobal(std::pair<uint32_t, uint32_t> PC) { return (PC.first) * 120 + (PC.second) + 1; }
};
struct MPARegItemComparer
......
HWDescription/RD53.cc
View file @ 895502e8
......@@ -242,7 +242,7 @@ void RD53::saveRegMap(const std::string& fName2Add)
{
const int Nspaces = 26;
std::string output = RD53Shared::composeFileName(configFileName, fName2Add);
std::string output = RD53::getFileName(fName2Add);
std::ofstream file(output.c_str(), std::ios::out | std::ios::trunc);
if(file)
......@@ -380,6 +380,11 @@ void RD53::injectPixel(unsigned int row, unsigned int col, bool inject) { fPixel
void RD53::setTDAC(unsigned int row, unsigned int col, uint8_t TDAC) { fPixelsMask[col].TDAC[row] = TDAC; }
void RD53::resetTDAC()
{
for(auto col = 0u; col < fPixelsMask.size(); col++) fPixelsMask[col].TDAC.fill(RD53Shared::setBits(RD53Constants::NBIT_TDAC) / 2);
}
uint8_t RD53::getTDAC(unsigned int row, unsigned int col) { return fPixelsMask[col].TDAC[row]; }
uint32_t RD53::getNumberOfChannels() const { return nRows * nCols; }
......
HWDescription/RD53.h
View file @ 895502e8
......@@ -29,16 +29,19 @@
// #########################
namespace RD53Constants
{
const uint8_t BROADCAST_CHIPID = 0x8; // Broadcast chip ID used to send the command to multiple chips
const uint8_t NREGIONS_LONGCMD = 6; // Number of regions to program with long write commands
const uint8_t FIELDS_SHORTCMD = 8; // Number of fields for the short write command
const uint8_t FIELDS_LONGCMD = 24; // Number of fields for the long write command
const uint8_t NBIT_TDAC = 4; // Number of TDAC bits
const uint8_t NBIT_MAXREG = 16; // Maximum number of bits for a chip register
const uint8_t NPIX_REGION = 4; // Number of pixels in a region (1x4)
const uint8_t NROW_CORE = 8; // Number of rows in a core
const uint8_t NBIT_ADDR = 9; // Number of address bits
const uint8_t NSYNC_WORS = 32; // Number of Sync words for synchronization
const uint8_t BROADCAST_CHIPID = 0x8; // Broadcast chip ID used to send the command to multiple chips
const uint8_t NREGIONS_LONGCMD = 6; // Number of regions to program with long write commands
const uint8_t FIELDS_SHORTCMD = 8; // Number of fields for the short write command
const uint8_t FIELDS_LONGCMD = 24; // Number of fields for the long write command
const uint8_t NBIT_TDAC = 4; // Number of TDAC bits
const uint8_t NBIT_MAXREG = 16; // Maximum number of bits for a chip register
const uint8_t NPIX_REGION = 4; // Number of pixels in a region (1x4)
const uint8_t NROW_CORE = 8; // Number of rows in a core
const uint8_t NBIT_ADDR = 9; // Number of address bits
const uint8_t NSYNC_WORS = 32; // Number of Sync words for synchronization
const uint8_t CDRCONFIG_ADDR = 0x40; // Address of CDR_CONFIG register
const uint16_t CDRCONFIG_1Gbit = 1048; // Value for 1.28 Gbit/s
const uint16_t CDRCONFIG_640Mbit = 1049; // Value for 640 Mbit/s
} // namespace RD53Constants
// ############
......@@ -153,6 +156,7 @@ class RD53 : public ReadoutChip
void enablePixel(unsigned int row, unsigned int col, bool enable);
void injectPixel(unsigned int row, unsigned int col, bool inject);
void setTDAC(unsigned int row, unsigned int col, uint8_t TDAC);
void resetTDAC();
uint8_t getTDAC(unsigned int row, unsigned int col);
uint8_t getChipLane() const { return myChipLane; }
......
HWDescription/SSA.cc
View file @ 895502e8
......@@ -22,11 +22,11 @@
namespace Ph2_HwDescription
{ // open namespace
SSA::SSA(const FrontEndDescription& pFeDesc, uint8_t pSSAId, uint8_t pPartnerId, uint8_t pSSASide, const std::string& filename) : ReadoutChip(pFeDesc, pSSAId)
SSA::SSA(const FrontEndDescription& pFeDesc, uint8_t pSSAId, uint8_t pPartnerId, uint8_t pSSASide, const std::string& filename) : ReadoutChip(pFeDesc, pSSAId)
{
fMaxRegValue = 255; // 8 bit registers in CBC
fChipOriginalMask = new ChannelGroup<120>;
fPartnerId = pPartnerId;
fPartnerId = pPartnerId;
loadfRegMap(filename);
setFrontEndType(FrontEndType::SSA);
}
......@@ -35,7 +35,7 @@ SSA::SSA(uint8_t pBeId, uint8_t pFMCId, uint8_t pFeId, uint8_t pSSAId, uint8_t p
{
fMaxRegValue = 255; // 8 bit registers in CBC
fChipOriginalMask = new ChannelGroup<120>;
fPartnerId = pPartnerId;
fPartnerId = pPartnerId;
loadfRegMap(filename);
setFrontEndType(FrontEndType::SSA);
}
......@@ -106,10 +106,6 @@ void SSA::loadfRegMap(const std::string& filename)
} // end loadfRegMap
void SSA::saveRegMap(const std::string& filename)
{ // start saveRegMap
......
HWDescription/SSA.h
View file @ 895502e8
......@@ -38,8 +38,8 @@ class SSA : public ReadoutChip
SSA(uint8_t pBeId, uint8_t pFMCId, uint8_t pFeId, uint8_t pSSAId, uint8_t pPartnerId, uint8_t pSSASide, const std::string& filename);
// C'tors with object FE Description
SSA(const FrontEndDescription& pFeDesc, uint8_t pSSAId, uint8_t pPartnerId, uint8_t pSSASide, const std::string& filename);
uint8_t fPartnerId;
uint8_t getPartid() {return fPartnerId;}
uint8_t fPartnerId;
uint8_t getPartid() { return fPartnerId; }
virtual void accept(HwDescriptionVisitor& pVisitor) { pVisitor.visitChip(*this); }
void loadfRegMap(const std::string& filename) override;
void saveRegMap(const std::string& filename) override;
......
HWInterface/D19cFWInterface.cc
View file @ 895502e8
......@@ -20,7 +20,7 @@
#include <time.h>
#include <uhal/uhal.hpp>
#pragma GCC diagnostic ignored "-Wpedantic"
// #pragma GCC diagnostic ignored "-Wpedantic"
// #pragma GCC diagnostic pop
using namespace Ph2_HwDescription;
......@@ -3700,18 +3700,11 @@ void D19cFWInterface::PSInterfaceBoard_PowerOn_MPA(float VDDPST, float DVDD, flo
PSInterfaceBoard_ConfigureI2CMaster(0, SLOW);
}
void D19cFWInterface::PSInterfaceBoard_PowerOn_MPASSA(float VDDPST, float DVDD, float AVDD, float VBG, float VBF, uint8_t mpaid, uint8_t ssaid)
{
this->getBoardInfo();
this->PSInterfaceBoard_PowerOn(0, 0);
uint32_t write = 0;
uint32_t SLOW = 2;
uint32_t i2cmux = 0;
......@@ -3724,9 +3717,6 @@ void D19cFWInterface::PSInterfaceBoard_PowerOn_MPASSA(float VDDPST, float DVDD,
float Vc = 0.0003632813;
LOG(INFO) << "mpa vdd on";
float Vlimit = 1.32;
......@@ -3736,12 +3726,10 @@ void D19cFWInterface::PSInterfaceBoard_PowerOn_MPASSA(float VDDPST, float DVDD,
if(setvoltage > 4095) setvoltage = 4095;
setvoltage = setvoltage << 4;
PSInterfaceBoard_SendI2CCommand(i2cmux, 0, write, 0, 0x01); // to SCO on PCA9646
PSInterfaceBoard_SendI2CCommand(dac7678, 0, write, 0x34, setvoltage); // tx to DAC C
std::this_thread::sleep_for(std::chrono::milliseconds(2000));
LOG(INFO) << "ssa vdd on";
Vlimit = 1.32;
......@@ -3756,8 +3744,6 @@ void D19cFWInterface::PSInterfaceBoard_PowerOn_MPASSA(float VDDPST, float DVDD,
PSInterfaceBoard_SendI2CCommand(dac7678, 0, write, 0x33, setvoltage); // tx to DAC C
std::this_thread::sleep_for(std::chrono::milliseconds(2000));
LOG(INFO) << "mpa vddD on";
Vlimit = 1.2;
if(DVDD > Vlimit) DVDD = Vlimit;
......@@ -3781,7 +3767,6 @@ void D19cFWInterface::PSInterfaceBoard_PowerOn_MPASSA(float VDDPST, float DVDD,
PSInterfaceBoard_SendI2CCommand(dac7678, 0, write, 0x31, setvoltage); // tx to DAC C
std::this_thread::sleep_for(std::chrono::milliseconds(2000));
LOG(INFO) << "mpa vddA on";
Vlimit = 1.32;
if(AVDD > Vlimit) AVDD = Vlimit;
......@@ -3804,10 +3789,6 @@ void D19cFWInterface::PSInterfaceBoard_PowerOn_MPASSA(float VDDPST, float DVDD,
PSInterfaceBoard_SendI2CCommand(dac7678, 0, write, 0x35, setvoltage); // tx to DAC C
std::this_thread::sleep_for(std::chrono::milliseconds(2000));
LOG(INFO) << "mpa VBG on";
Vlimit = 0.5;
if(VBG > Vlimit) VBG = Vlimit;
......@@ -3841,7 +3822,6 @@ void D19cFWInterface::PSInterfaceBoard_PowerOn_MPASSA(float VDDPST, float DVDD,
std::this_thread::sleep_for(std::chrono::milliseconds(500));
PSInterfaceBoard_SendI2CCommand(pcf8574, 0, write, 0, 145); // set reset bit
/*LOG(INFO) << "mpa enable";
//uint32_t val2 = (mpaid << 5) + 16;
uint32_t val2 = (mpaid << 5) + (ssaid << 1) + 1; // reset bit for MPA
......@@ -3853,11 +3833,8 @@ void D19cFWInterface::PSInterfaceBoard_PowerOn_MPASSA(float VDDPST, float DVDD,
// disable the i2c master at the end (first set the mux to the chip
PSInterfaceBoard_SendI2CCommand(i2cmux, 0, write, 0, 0x04);
PSInterfaceBoard_ConfigureI2CMaster(0, SLOW);
}
void D19cFWInterface::PSInterfaceBoard_PowerOff_SSA(uint8_t mpaid, uint8_t ssaid)
{
uint32_t write = 0;
......
HWInterface/D19cFWInterface.h
View file @ 895502e8
......@@ -655,7 +655,7 @@ class D19cFWInterface : public BeBoardFWInterface
void PSInterfaceBoard_PowerOn(uint8_t mpaid = 0, uint8_t ssaid = 0);
void PSInterfaceBoard_PowerOff();
void PSInterfaceBoard_PowerOn_MPASSA(float VDDPST = 1.25, float DVDD = 1.2, float AVDD = 1.25, float VBG = 0.3, float VBF=0.3,uint8_t mpaid = 0, uint8_t ssaid = 0);
void PSInterfaceBoard_PowerOn_MPASSA(float VDDPST = 1.25, float DVDD = 1.2, float AVDD = 1.25, float VBG = 0.3, float VBF = 0.3, uint8_t mpaid = 0, uint8_t ssaid = 0);
// MPA power on
void PSInterfaceBoard_PowerOn_MPA(float VDDPST = 1.25, float DVDD = 1.2, float AVDD = 1.25, float VBG = 0.3, uint8_t mpaid = 0, uint8_t ssaid = 0);
void PSInterfaceBoard_PowerOff_MPA(uint8_t mpaid = 0, uint8_t ssaid = 0);
......
HWInterface/D19clpGBTInterface.cc
View file @ 895502e8
......@@ -22,7 +22,7 @@ bool D19clpGBTInterface::ConfigureChip(Ph2_HwDescription::Chip* pChip, bool pVer
{
LOG(INFO) << BOLDBLUE << "Configuring lpGBT" << RESET;
setBoard(pChip->getBeBoardId());
//Load register map from configuration file
// Load register map from configuration file
ChipRegMap clpGBTRegMap = pChip->getRegMap();
for(const auto& cRegItem: clpGBTRegMap)
{
......
HWInterface/MPAInterface.cc
View file @ 895502e8
......@@ -170,7 +170,7 @@ bool MPAInterface::ConfigureChip(Chip* pMPA, bool pVerifLoop, uint32_t pBlockSiz
if(cSuccess)
{
auto cReadBack = ReadChipReg(pMPA, cRegItem.first);
//LOG(INFO) << BOLDRED << cRegItem.first<<" "<<cReadBack<<","<<cRegItem.second.fValue << RESET;
// LOG(INFO) << BOLDRED << cRegItem.first<<" "<<cReadBack<<","<<cRegItem.second.fValue << RESET;
if(cReadBack != cRegItem.second.fValue)
{
std::size_t found = (cRegItem.first).find("ReadCounter");
......
HWInterface/MPAInterface.h
View file @ 895502e8
......@@ -78,7 +78,7 @@ class MPAInterface : public ReadoutChipInterface
void Activate_sync(Ph2_HwDescription::Chip* pMPA);
void Activate_pp(Ph2_HwDescription::Chip* pMPA);
void Activate_ss(Ph2_HwDescription::Chip* pMPA);
void Activate_ps(Ph2_HwDescription::Chip* pMPA, uint8_t win=8);
void Activate_ps(Ph2_HwDescription::Chip* pMPA, uint8_t win = 8);
void Enable_pix_counter(Ph2_HwDescription::ReadoutChip* pMPA, uint32_t p);
void Enable_pix_sync(Ph2_HwDescription::ReadoutChip* pMPA, uint32_t p);
......
HWInterface/RD53FWInterface.cc
View file @ 895502e8
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