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Remove the last (?) left-over Xilinx-licensed files from the repo

Jeroen Hegeman requested to merge jhegeman/tclink:remove_leftover_xilinx_licensed_files into master

During !18 (merged) it turns out that we overlooked the example design files. Those are also Xilinx-licensed.

These changes recreate the example projects associated with the IP cores when these are recreated. And then the 'core' example files are copied along with the regenerated core files.

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