diff --git a/Simulation/FastSimulation/FastChainPileup/test/test_FastChain_fatras_mc16a_ttbar.sh b/Simulation/FastSimulation/FastChainPileup/test/test_FastChain_fatras_mc16a_ttbar.sh index ffdf8586e059ec09cb1879c0ac180d0caea83fbf..615d90e475b7cce0a5ea53a3712392a08f81e830 100755 --- a/Simulation/FastSimulation/FastChainPileup/test/test_FastChain_fatras_mc16a_ttbar.sh +++ b/Simulation/FastSimulation/FastChainPileup/test/test_FastChain_fatras_mc16a_ttbar.sh @@ -1,10 +1,5 @@ #!/bin/sh # -# art-description: Run AFII simulation and full digitization of an MC16a ttbar sample with 2016a geometry and conditions, 25ns pile-up -# art-type: grid -# art-include: 21.3/Athena -# art-output: *.root -# art-output: config.txt HighPtMinbiasHitsFiles="/cvmfs/atlas-nightlies.cern.ch/repo/data/data-art/Tier0ChainTests/mc16_13TeV.361239.Pythia8EvtGen_A3NNPDF23LO_minbias_inelastic_high.merge.HITS.e4981_s3087_s3089/*" LowPtMinbiasHitsFiles="/cvmfs/atlas-nightlies.cern.ch/repo/data/data-art/Tier0ChainTests/mc16_13TeV.361238.Pythia8EvtGen_A3NNPDF23LO_minbias_inelastic_low.merge.HITS.e4981_s3087_s3089/*" @@ -18,13 +13,13 @@ FastChain_tf.py \ --enableLooperKiller True \ --inputEVNTFile /cvmfs/atlas-nightlies.cern.ch/repo/data/data-art/ISF_Validation/mc12_valid.110401.PowhegPythia_P2012_ttbar_nonallhad.evgen.EVNT.e3099.01517252._000001.pool.root.1 \ --outputRDOFile RDO.pool.root \ - --maxEvents 10 \ + --maxEvents 5 \ --skipEvents 0 \ --geometryVersion default:ATLAS-R2-2016-01-00-01 \ --conditionsTag default:OFLCOND-MC16-SDR-16 \ --preSimExec 'from TrkDetDescrSvc.TrkDetDescrJobProperties import TrkDetFlags;TrkDetFlags.TRT_BuildStrawLayers=True;from Digitization.DigitizationFlags import digitizationFlags;digitizationFlags.experimentalDigi=["NewMerge"]' \ --preExec 'EVNTtoRDO:ToolSvc.NewMergeMcEventCollTool.OutputLevel=VERBOSE;' \ - --postInclude='PyJobTransforms/UseFrontier.py' \ + --postInclude='PyJobTransforms/UseFrontier.py,G4AtlasTests/postInclude.SplitSG_FCpileup.py' \ --postExec 'from AthenaCommon.ConfigurationShelve import saveToAscii;saveToAscii("config.txt");ServiceMgr.MessageSvc.Format = "% F%32W%S%7W%R%T %0W%M"' \ --DataRunNumber '284500' \ --inputHighPtMinbiasHitsFile ${HighPtMinbiasHitsFiles} \ @@ -34,17 +29,17 @@ FastChain_tf.py \ --numberOfLowPtMinBias '44.3839246425' \ --numberOfCavernBkg 0 \ --imf False -rc=$? -echo "art-result: $rc EVNTtoRDO" +# rc=$? +# echo "art-result: $rc EVNTtoRDO" -rc2=-9999 -if [ ${rc} -eq 0 ] -then - # Regression test - ArtPackage=$1 - ArtJobName=$2 - art.py compare grid --entries 10 ${ArtPackage} ${ArtJobName} --mode=summary - rc2=$? +# rc2=-9999 +# if [ ${rc} -eq 0 ] +# then +# # Regression test +# ArtPackage=$1 +# ArtJobName=$2 +# art.py compare grid --entries 10 ${ArtPackage} ${ArtJobName} --mode=summary +# rc2=$? -fi -echo "art-result: ${rc2} regression" +# fi +# echo "art-result: ${rc2} regression" diff --git a/Simulation/FastSimulation/FastChainPileup/test/test_fastchain_g4ms_mc16a_ttbar.sh b/Simulation/FastSimulation/FastChainPileup/test/test_fastchain_g4ms_mc16a_ttbar.sh index 31d880539995f5b6adf93ae683af08490a8cb3b9..29f79e971727e3f60b477f159bb463003ec24f43 100755 --- a/Simulation/FastSimulation/FastChainPileup/test/test_fastchain_g4ms_mc16a_ttbar.sh +++ b/Simulation/FastSimulation/FastChainPileup/test/test_fastchain_g4ms_mc16a_ttbar.sh @@ -24,7 +24,7 @@ FastChain_tf.py \ --conditionsTag default:OFLCOND-MC16-SDR-16 \ --preSimExec 'from TrkDetDescrSvc.TrkDetDescrJobProperties import TrkDetFlags;TrkDetFlags.TRT_BuildStrawLayers=True;from Digitization.DigitizationFlags import digitizationFlags;digitizationFlags.experimentalDigi=["NewMerge"]' \ --preExec 'EVNTtoRDO:ToolSvc.NewMergeMcEventCollTool.OutputLevel=VERBOSE;' \ - --postInclude='PyJobTransforms/UseFrontier.py' \ + --postInclude='PyJobTransforms/UseFrontier.py,G4AtlasTests/postInclude.SplitSG_FCpileup.py' \ --postExec 'from AthenaCommon.ConfigurationShelve import saveToAscii;saveToAscii("config.txt");ServiceMgr.MessageSvc.Format = "% F%32W%S%7W%R%T %0W%M"' \ --DataRunNumber '284500' \ --inputHighPtMinbiasHitsFile ${HighPtMinbiasHitsFiles} \