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Commit ade62a96 authored by Brian Petersen's avatar Brian Petersen
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Merge branch '23.0_L1CaloFEXSim_const' into '23.0' 

L1CaloFEXSim: make method const

See merge request !64851
parents 9215c5bb aaaa8c1f
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2 merge requests!648892023-08-08: daily sweep of 23.0 into main,!64851L1CaloFEXSim: make method const
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Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/eFEXtauAlgo.h
+ 9
− 9
View file @ ade62a96
......@@ -38,24 +38,24 @@ namespace LVL1 {
virtual void setup(int inputTable[3][3], int efex_id, int fpga_id, int central_eta) override;
virtual std::unique_ptr<eFEXtauTOB> getTauTOB() override;
virtual unsigned int rCoreCore() override;
virtual unsigned int rCoreEnv() override;
virtual unsigned int rHadCore() override;
virtual unsigned int rHadEnv() override;
virtual std::unique_ptr<eFEXtauTOB> getTauTOB() const override;
virtual unsigned int rCoreCore() const override;
virtual unsigned int rCoreEnv() const override;
virtual unsigned int rHadCore() const override;
virtual unsigned int rHadEnv() const override;
virtual void getSums(unsigned int seed, bool UnD,
std::vector<unsigned int> & RcoreSums,
std::vector<unsigned int> & Remums) override;
virtual unsigned int getEt() override;
virtual unsigned int getBitwiseEt() override;
virtual unsigned int getEt() const override;
virtual unsigned int getBitwiseEt() const override;
protected:
private:
virtual void setSupercellSeed() override;
virtual void setUnDAndOffPhi() override;
virtual bool getUnD() override;
virtual unsigned int getSeed() override;
virtual bool getUnD() const override;
virtual unsigned int getSeed() const override;
unsigned int m_seed = 0;
bool m_und = false;
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/eFEXtauAlgoBase.h
+ 12
− 12
View file @ ade62a96
......@@ -34,24 +34,24 @@ public:
virtual StatusCode safetyTest() override;
virtual void compute() override {};
virtual bool isCentralTowerSeed() override;
virtual bool isBDT() override { return false; }
virtual bool isCentralTowerSeed() const override;
virtual bool isBDT() const override { return false; }
virtual void setThresholds(std::vector<unsigned int> rHadThreshold,
std::vector<unsigned int> bdtThreshold,
unsigned int etThreshold,
unsigned int etThresholdForRHad) override;
virtual void getRCore(std::vector<unsigned int> & rCoreVec) override;
virtual unsigned int rCoreCore() override { return 0; }
virtual unsigned int rCoreEnv() override { return 0; }
virtual float getRealRCore() override;
virtual void getRHad(std::vector<unsigned int> &rHadVec) override;
virtual float getRealRHad() override;
virtual void getRCore(std::vector<unsigned int> & rCoreVec) const override;
virtual unsigned int rCoreCore() const override { return 0; }
virtual unsigned int rCoreEnv() const override { return 0; }
virtual float getRealRCore() const override;
virtual void getRHad(std::vector<unsigned int> &rHadVec) const override;
virtual float getRealRHad() const override;
virtual void getSums(unsigned int seed, bool UnD,
std::vector<unsigned int> & RcoreSums,
std::vector<unsigned int> & Remums) override;
virtual unsigned int getBDTScore() override { return 0; }
virtual unsigned int getBDTCondition() override { return 0; };
virtual unsigned int getBDTScore() const override { return 0; }
virtual unsigned int getBDTCondition() const override { return 0; };
protected:
SG::ReadHandleKey<LVL1::eTowerContainer> m_eTowerContainerKey {this, "MyETowers", "eTowerContainer", "Input container for eTowers"};
......@@ -64,8 +64,8 @@ protected:
virtual void setSupercellSeed() { }
virtual void setUnDAndOffPhi() { }
virtual bool getUnD() override { return 0; }
virtual unsigned int getSeed() override { return 0; }
virtual bool getUnD() const override { return 0; }
virtual unsigned int getSeed() const override { return 0; }
unsigned int m_em0cells[3][3];
unsigned int m_em1cells[12][3];
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/eFEXtauBDT.h
+ 12
− 12
View file @ ade62a96
......@@ -57,11 +57,11 @@ public:
void initEMETPointers();
void initHADETPointers();
void initTowersPointers();
unsigned int getETEstimate() { return m_eTEstimate; }
unsigned int getEMETEstimate() { return m_EM_eTEstimate; }
unsigned int getEMETEstimateOverflow() { return m_EM_eTEstimateOverflow; }
unsigned int getHADETEstimate() { return m_HAD_eTEstimate; }
unsigned int getHADETEstimateOverflow() { return m_HAD_eTEstimateOverflow; }
unsigned int getETEstimate() const { return m_eTEstimate; }
unsigned int getEMETEstimate() const { return m_EM_eTEstimate; }
unsigned int getEMETEstimateOverflow() const { return m_EM_eTEstimateOverflow; }
unsigned int getHADETEstimate() const { return m_HAD_eTEstimate; }
unsigned int getHADETEstimateOverflow() const { return m_HAD_eTEstimateOverflow; }
std::vector<unsigned int> &getBDTVars() { return m_bdtVars; }
std::vector<unsigned int> &getTowers() { return m_towers; }
std::vector<unsigned int> &getEMMultipliedByFracParams() {
......@@ -70,17 +70,17 @@ public:
std::vector<unsigned int> &getEMMultipliedByFracParamsOverflow() {
return m_emEtXMultiplierOverflow;
}
unsigned int getBDTScoreShifted() { return m_bdtScoreShifted; }
unsigned int getBDTScoreShifted() const { return m_bdtScoreShifted; }
// ======= These are the important getters ======
// These are the fields in the algorithm's output TOB structure in the
// VHDL implementation of eFEXFirmware (TriggerObjectCore_tau type in VHDL)
unsigned int getET();
unsigned int getTOBETOverflow() { return m_eTEstimateOverflow; }
unsigned int getIsMax() { return m_isSeeded; }
unsigned int getBDTCondition() { return m_bdtCondition; }
unsigned int getFracCondition() { return m_fracCondition; }
unsigned int getBDTScore() { return m_bdtScore; }
unsigned int getET() const;
unsigned int getTOBETOverflow() const { return m_eTEstimateOverflow; }
unsigned int getIsMax() const { return m_isSeeded; }
unsigned int getBDTCondition() const { return m_bdtCondition; }
unsigned int getFracCondition() const { return m_fracCondition; }
unsigned int getBDTScore() const { return m_bdtScore; }
// ================================================================================
unsigned int multWithOverflow(unsigned int a, unsigned int b, bool &overflow,
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/eFEXtauBDTAlgo.h
+ 8
− 8
View file @ ade62a96
......@@ -42,14 +42,14 @@ public:
int central_eta) override;
virtual void compute() override;
virtual std::unique_ptr<eFEXtauTOB> getTauTOB() override;
virtual unsigned int rHadCore() override;
virtual unsigned int rHadEnv() override;
virtual unsigned int getEt() override;
virtual unsigned int getBitwiseEt() override;
virtual unsigned int getBDTScore() override;
virtual unsigned int getBDTCondition() override;
virtual bool isBDT() override;
virtual std::unique_ptr<eFEXtauTOB> getTauTOB() const override;
virtual unsigned int rHadCore() const override;
virtual unsigned int rHadEnv() const override;
virtual unsigned int getEt() const override;
virtual unsigned int getBitwiseEt() const override;
virtual unsigned int getBDTScore() const override;
virtual unsigned int getBDTCondition() const override;
virtual bool isBDT() const override;
virtual void setThresholds(std::vector<unsigned int> rHadThreshold,
std::vector<unsigned int> bdtThreshold,
unsigned int etThreshold,
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/gFEXJwoJAlgo.h
+ 10
− 10
View file @ ade62a96
/*
Copyright (C) 2002-2022 CERN for the benefit of the ATLAS collaboration
Copyright (C) 2002-2023 CERN for the benefit of the ATLAS collaboration
*/
//***************************************************************************
// gFEXJwoJAlgo - Jets without jets algorithm for gFEX
......@@ -58,28 +58,28 @@ namespace LVL1 {
float m_gBlockthresholdB;
float m_gBlockthresholdC;
void makeFPGAC(gTowersForward twrsCN, gTowersForward twrsCP, gTowersCentral & twrsC);
void makeFPGAC(const gTowersForward& twrsCN, const gTowersForward& twrsCP, gTowersCentral & twrsC) const;
void gBlockAB(gTowersCentral twrs, gTowersCentral & gBlkSum);
void gBlockAB(const gTowersCentral& twrs, gTowersCentral & gBlkSum) const;
void metFPGA(gTowersCentral twrs, gTowersCentral & gBlkSum, int gBlockthreshold,
void metFPGA(const gTowersCentral& twrs, const gTowersCentral& gBlkSum, int gBlockthreshold,
float aFPGA, float bFPGA,
int & MHT_x, int & MHT_y,
int & MST_x, int & MST_y,
int & MET_x, int & MET_y);
int & MET_x, int & MET_y) const;
void metTotal(int A_MET_x, int A_MET_y,
int B_MET_x, int B_MET_y,
int C_MET_x, int C_MET_y,
int & MET_x, int & MET_y, int & MET);
int & MET_x, int & MET_y, int & MET) const;
void sumEtFPGA(gTowersCentral twrs, int & partial_sumEt);
void sumEtFPGA(const gTowersCentral& twrs, int & partial_sumEt) const;
void sumEt(int A_sumEt, int B_sumEt, int C_sumEt, int & total_sumEt);
void sumEt(int A_sumEt, int B_sumEt, int C_sumEt, int & total_sumEt) const;
float sinLUT(unsigned int phiIDX, unsigned int aw);
float sinLUT(unsigned int phiIDX, unsigned int aw) const;
float cosLUT(unsigned int phiIDX, unsigned int aw);
float cosLUT(unsigned int phiIDX, unsigned int aw) const;
};
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/gFEXaltMetAlgo.h
+ 11
− 12
View file @ ade62a96
/*
Copyright (C) 2002-2022 CERN for the benefit of the ATLAS collaboration
Copyright (C) 2002-2023 CERN for the benefit of the ATLAS collaboration
*/
//***************************************************************************
// gFEXaltMetAlgo - Noise cut and Rho+RMS algorithm for gFEX MET
......@@ -50,27 +50,27 @@ namespace LVL1 {
int m_rhoPlusThr;
void metFPGA(const gTowersCentral &twrs, int & MET_x, int & MET_y, const unsigned short FPGA_NO);
void metFPGA(const gTowersCentral &twrs, int & MET_x, int & MET_y, const unsigned short FPGA_NO) const;
void metTotal(const int A_MET_x, const int A_MET_y,
const int B_MET_x, const int B_MET_y,
int & MET_x, int & MET_y, int & MET);
int & MET_x, int & MET_y, int & MET) const;
int get_rho(const gTowersCentral &twrs);
int get_rho(const gTowersCentral &twrs) const;
int get_sigma(const gTowersCentral &twrs);
int get_sigma(const gTowersCentral &twrs) const;
void rho_MET(const gTowersCentral &twrs, int & MET_x, int & MET_y, const int rho, const int sigma);
void rho_MET(const gTowersCentral &twrs, int & MET_x, int & MET_y, const int rho, const int sigma) const;
int sumEtFPGAnc(const gTowersCentral &twrs, const unsigned short FPGA_NO);
int sumEtFPGAnc(const gTowersCentral &twrs, const unsigned short FPGA_NO) const;
int sumEtFPGArms(const gTowersCentral &twrs, const int sigma);
int sumEtFPGArms(const gTowersCentral &twrs, const int sigma) const;
int sumEt(const int A_sumEt, const int B_sumEt);
int sumEt(const int A_sumEt, const int B_sumEt) const;
float sinLUT(const unsigned int phiIDX, const unsigned int aw);
float sinLUT(const unsigned int phiIDX, const unsigned int aw) const;
float cosLUT(const unsigned int phiIDX, const unsigned int aw);
float cosLUT(const unsigned int phiIDX, const unsigned int aw) const;
};
......@@ -78,4 +78,3 @@ namespace LVL1 {
#endif
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/jFEXSmallRJetAlgo.h
+ 5
− 5
View file @ ade62a96
......@@ -39,13 +39,13 @@ namespace LVL1 {
virtual StatusCode safetyTest() override;
virtual void setup(int inputTable[7][7], int inputTableDisplaced[7][7]) override;
virtual unsigned int getTTowerET(unsigned int TTID ) override;
virtual unsigned int getTTowerET(unsigned int TTID ) const override;
virtual void buildSeeds() override;
virtual bool isSeedLocalMaxima() override;
virtual unsigned int getSmallClusterET() override;
virtual unsigned int getSmallETRing() override;
virtual unsigned int getTTIDcentre() override;
virtual void setFPGAEnergy(std::unordered_map<int,std::vector<int> > et_map) override;
virtual unsigned int getSmallClusterET() const override;
virtual unsigned int getSmallETRing() const override;
virtual unsigned int getTTIDcentre() const override;
virtual void setFPGAEnergy(const std::unordered_map<int,std::vector<int> >& et_map) override;
private:
SG::ReadHandleKey<LVL1::jTowerContainer> m_jTowerContainerKey {this, "MyjTowers", "jTowerContainer", "Input container for jTowers"};
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/jFEXSysSim.h
+ 8
− 10
View file @ ade62a96
......@@ -64,11 +64,11 @@ namespace LVL1 {
virtual StatusCode execute(jFEXOutputCollection* inputOutputCollection) override ;
virtual void init() override ;
virtual void init() const override;
virtual void cleanup() override;
virtual int calcTowerID(int eta, int phi, int mod) override ;
virtual int calcTowerID(int eta, int phi, int mod) const override;
......@@ -108,14 +108,12 @@ namespace LVL1 {
// Create and fill a new EDMs object
StatusCode fillSRJetEDM(uint8_t jFexNum, uint8_t fpgaNumber, uint32_t tobWord, char istob, int resolution, float_t eta, float_t phi, std::unique_ptr< xAOD::jFexSRJetRoIContainer > &jContainer);
StatusCode fillLRJetEDM(uint8_t jFexNum, uint8_t fpgaNumber, uint32_t tobWord, char istob, int resolution, float_t eta, float_t phi, std::unique_ptr< xAOD::jFexLRJetRoIContainer > &jContainer);
StatusCode fillTauEDM (uint8_t jFexNum, uint8_t fpgaNumber, uint32_t tobWord, char istob, int resolution, float_t eta, float_t phi, std::unique_ptr< xAOD::jFexTauRoIContainer > &jContainer);
StatusCode fillFwdElEDM(uint8_t jFexNum, uint8_t fpgaNumber, uint32_t tobWord, char istob, int resolution, float_t eta, float_t phi, std::unique_ptr< xAOD::jFexFwdElRoIContainer > &jContainer);
StatusCode fillSumEtEDM(uint8_t jFexNum, uint8_t fpgaNumber, uint32_t tobWord, int resolution, std::unique_ptr< xAOD::jFexSumETRoIContainer > &jContainer);
StatusCode fillMetEDM (uint8_t jFexNum, uint8_t fpgaNumber, uint32_t tobWord, int resolution, std::unique_ptr< xAOD::jFexMETRoIContainer > &jContainer);
StatusCode fillSRJetEDM(uint8_t jFexNum, uint8_t fpgaNumber, uint32_t tobWord, char istob, int resolution, float_t eta, float_t phi, std::unique_ptr< xAOD::jFexSRJetRoIContainer > &jContainer) const;
StatusCode fillLRJetEDM(uint8_t jFexNum, uint8_t fpgaNumber, uint32_t tobWord, char istob, int resolution, float_t eta, float_t phi, std::unique_ptr< xAOD::jFexLRJetRoIContainer > &jContainer) const;
StatusCode fillTauEDM (uint8_t jFexNum, uint8_t fpgaNumber, uint32_t tobWord, char istob, int resolution, float_t eta, float_t phi, std::unique_ptr< xAOD::jFexTauRoIContainer > &jContainer) const;
StatusCode fillFwdElEDM(uint8_t jFexNum, uint8_t fpgaNumber, uint32_t tobWord, char istob, int resolution, float_t eta, float_t phi, std::unique_ptr< xAOD::jFexFwdElRoIContainer > &jContainer) const;
StatusCode fillSumEtEDM(uint8_t jFexNum, uint8_t fpgaNumber, uint32_t tobWord, int resolution, std::unique_ptr< xAOD::jFexSumETRoIContainer > &jContainer) const;
StatusCode fillMetEDM (uint8_t jFexNum, uint8_t fpgaNumber, uint32_t tobWord, int resolution, std::unique_ptr< xAOD::jFexMETRoIContainer > &jContainer) const;
};
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/L1CaloFEXSim/jFEXsumETAlgo.h
+ 2
− 2
View file @ ade62a96
......@@ -40,7 +40,7 @@ namespace LVL1 {
/** Destructor **/
virtual ~jFEXsumETAlgo();
virtual StatusCode safetyTest() override;
virtual StatusCode safetyTest() const override;
virtual void setup(int FPGA[FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_thin_algoSpace_width]) override;
virtual void setup(int FPGA[FEXAlgoSpaceDefs::jFEX_algoSpace_height][FEXAlgoSpaceDefs::jFEX_wide_algoSpace_width]) override;
virtual int getTTowerET(unsigned int TTID=0) override; // arguments 2,2 to get the central TT from m_TTwindow[5][5]
......@@ -48,7 +48,7 @@ namespace LVL1 {
virtual void buildBarrelSumET() override;
virtual void buildFWDSumET() override;
virtual int getETlowerEta(uint bin) override;
virtual int getETupperEta(uint bin) override;
virtual int getETupperEta(uint bin) override;
virtual void setFPGAEnergy(std::unordered_map<int,std::vector<int> > et_map) override;
protected:
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/eFEXtauAlgo.cxx
+ 9
− 13
View file @ ade62a96
......@@ -44,7 +44,7 @@ void LVL1::eFEXtauAlgo::setup(int inputTable[3][3], int efex_id, int fpga_id, in
}
std::unique_ptr<LVL1::eFEXtauTOB> LVL1::eFEXtauAlgo::getTauTOB()
std::unique_ptr<LVL1::eFEXtauTOB> LVL1::eFEXtauAlgo::getTauTOB() const
{
std::unique_ptr<eFEXtauTOB> tob = std::make_unique<eFEXtauTOB>();
unsigned int et = getEt();
......@@ -62,7 +62,7 @@ std::unique_ptr<LVL1::eFEXtauTOB> LVL1::eFEXtauAlgo::getTauTOB()
}
// Calculate reconstructed ET value
unsigned int LVL1::eFEXtauAlgo::getEt()
unsigned int LVL1::eFEXtauAlgo::getEt() const
{
if (m_cellsSet == false){
ATH_MSG_DEBUG("Layers not built, cannot accurately calculate Et.");
......@@ -119,7 +119,7 @@ unsigned int LVL1::eFEXtauAlgo::getEt()
return out;
}
unsigned int LVL1::eFEXtauAlgo::rCoreCore()
unsigned int LVL1::eFEXtauAlgo::rCoreCore() const
{
if (m_cellsSet == false){
ATH_MSG_DEBUG("Layers not built, cannot calculate rCore core value");
......@@ -138,10 +138,9 @@ unsigned int LVL1::eFEXtauAlgo::rCoreCore()
if (out > 0xffff) out = 0xffff;
return out;
}
unsigned int LVL1::eFEXtauAlgo::rCoreEnv()
unsigned int LVL1::eFEXtauAlgo::rCoreEnv() const
{
if (m_cellsSet == false){
ATH_MSG_DEBUG("Layers not built, cannot calculate rCore environment value");
......@@ -166,10 +165,9 @@ unsigned int LVL1::eFEXtauAlgo::rCoreEnv()
if (out > 0xffff) out = 0xffff;
return out;
}
unsigned int LVL1::eFEXtauAlgo::rHadCore()
unsigned int LVL1::eFEXtauAlgo::rHadCore() const
{
if (m_cellsSet == false){
ATH_MSG_DEBUG("Layers not built, cannot calculate rHad core value");
......@@ -188,10 +186,9 @@ unsigned int LVL1::eFEXtauAlgo::rHadCore()
if (out > 0xffff) out = 0xffff;
return out;
}
unsigned int LVL1::eFEXtauAlgo::rHadEnv()
unsigned int LVL1::eFEXtauAlgo::rHadEnv() const
{
if (m_cellsSet == false){
ATH_MSG_DEBUG("Layers not built, cannot calculate rHad environment value");
......@@ -220,7 +217,6 @@ unsigned int LVL1::eFEXtauAlgo::rHadEnv()
if (out > 0xffff) out = 0xffff;
return out;
}
// Set the off phi value used to calculate ET and isolation
......@@ -283,18 +279,18 @@ void LVL1::eFEXtauAlgo::setSupercellSeed()
// Return the bitwise value of the given Et
// See eFEXtauBaseAlgo for a first attempt at this
unsigned int LVL1::eFEXtauAlgo::getBitwiseEt()
unsigned int LVL1::eFEXtauAlgo::getBitwiseEt() const
{
unsigned int out = 0;
return out;
}
bool LVL1::eFEXtauAlgo::getUnD()
bool LVL1::eFEXtauAlgo::getUnD() const
{
return m_und;
}
unsigned int LVL1::eFEXtauAlgo::getSeed()
unsigned int LVL1::eFEXtauAlgo::getSeed() const
{
return m_seed;
}
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/eFEXtauAlgoBase.cxx
+ 6
− 8
View file @ ade62a96
......@@ -84,12 +84,10 @@ void LVL1::eFEXtauAlgoBase::buildLayers(int efex_id, int fpga_id,
// Utility function to calculate and return jet discriminant sums for specified
// location Intended to allow xAOD TOBs to be decorated with this information
void LVL1::eFEXtauAlgoBase::getSums(unsigned int seed, bool UnD,
void LVL1::eFEXtauAlgoBase::getSums(unsigned int /*seed*/, bool /*UnD*/,
std::vector<unsigned int> &RcoreSums,
std::vector<unsigned int> &RemSums) {
// Set seed parameters to supplied values
(void)UnD;
(void)seed; // In this function seed has range 4-7
// Now just call the 2 discriminant calculation methods
getRCore(RcoreSums);
......@@ -97,7 +95,7 @@ void LVL1::eFEXtauAlgoBase::getSums(unsigned int seed, bool UnD,
}
// Calculate the hadronic fraction isolation variable
void LVL1::eFEXtauAlgoBase::getRHad(std::vector<unsigned int> &rHadVec) {
void LVL1::eFEXtauAlgoBase::getRHad(std::vector<unsigned int> &rHadVec) const {
unsigned int core = rHadCore();
unsigned int env = rHadEnv();
......@@ -106,7 +104,7 @@ void LVL1::eFEXtauAlgoBase::getRHad(std::vector<unsigned int> &rHadVec) {
}
// Calculate float isolation variable
float LVL1::eFEXtauAlgoBase::getRealRCore() {
float LVL1::eFEXtauAlgoBase::getRealRCore() const {
unsigned int core = rCoreCore();
unsigned int env = rCoreEnv();
......@@ -118,7 +116,7 @@ float LVL1::eFEXtauAlgoBase::getRealRCore() {
return out;
}
float LVL1::eFEXtauAlgoBase::getRealRHad() {
float LVL1::eFEXtauAlgoBase::getRealRHad() const {
unsigned int core = rHadCore();
unsigned int env = rHadEnv();
......@@ -130,7 +128,7 @@ float LVL1::eFEXtauAlgoBase::getRealRHad() {
return out;
}
void LVL1::eFEXtauAlgoBase::getRCore(std::vector<unsigned int> &rCoreVec) {
void LVL1::eFEXtauAlgoBase::getRCore(std::vector<unsigned int> &rCoreVec) const {
unsigned int core = rCoreCore();
unsigned int env = rCoreEnv();
......@@ -139,7 +137,7 @@ void LVL1::eFEXtauAlgoBase::getRCore(std::vector<unsigned int> &rCoreVec) {
}
// Check if central tower qualifies as a seed tower for the tau algorithm
bool LVL1::eFEXtauAlgoBase::isCentralTowerSeed() {
bool LVL1::eFEXtauAlgoBase::isCentralTowerSeed() const {
// Need layer cell ET arrays to be built
if (m_cellsSet == false) {
ATH_MSG_DEBUG(
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/eFEXtauBDT.cxx
+ 1
− 1
View file @ ade62a96
......@@ -442,7 +442,7 @@ void LVL1::eFEXtauBDT::computeIsCentralTowerSeed() {
m_log->msg(MSG::DEBUG) << "Seeded: " << (int)m_isSeeded << endmsg;
}
unsigned int LVL1::eFEXtauBDT::getET() {
unsigned int LVL1::eFEXtauBDT::getET() const {
if (m_eTEstimateOverflow) {
return (1 << ENERGY_WIDTH) - 1;
}
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/eFEXtauBDTAlgo.cxx
+ 8
− 8
View file @ ade62a96
......@@ -58,7 +58,7 @@ void LVL1::eFEXtauBDTAlgo::setup(int inputTable[3][3], int efex_id, int fpga_id,
void LVL1::eFEXtauBDTAlgo::compute() { m_bdtAlgoImpl->next(); }
std::unique_ptr<LVL1::eFEXtauTOB> LVL1::eFEXtauBDTAlgo::getTauTOB() {
std::unique_ptr<LVL1::eFEXtauTOB> LVL1::eFEXtauBDTAlgo::getTauTOB() const {
std::unique_ptr<eFEXtauTOB> tob = std::make_unique<eFEXtauTOB>();
unsigned int et = getEt();
tob->setEt(et);
......@@ -105,7 +105,7 @@ void LVL1::eFEXtauBDTAlgo::setThresholdPointers() {
}
// Calculate reconstructed ET value
unsigned int LVL1::eFEXtauBDTAlgo::getEt() {
unsigned int LVL1::eFEXtauBDTAlgo::getEt() const {
if (m_cellsSet == false) {
ATH_MSG_DEBUG("Layers not built, cannot accurately calculate Et.");
}
......@@ -113,7 +113,7 @@ unsigned int LVL1::eFEXtauBDTAlgo::getEt() {
return m_bdtAlgoImpl->getETEstimate();
}
unsigned int LVL1::eFEXtauBDTAlgo::rHadCore() {
unsigned int LVL1::eFEXtauBDTAlgo::rHadCore() const {
if (m_cellsSet == false) {
ATH_MSG_DEBUG("Layers not built, cannot calculate rHad core value");
}
......@@ -121,7 +121,7 @@ unsigned int LVL1::eFEXtauBDTAlgo::rHadCore() {
return m_bdtAlgoImpl->getHADETEstimate();
}
unsigned int LVL1::eFEXtauBDTAlgo::rHadEnv() {
unsigned int LVL1::eFEXtauBDTAlgo::rHadEnv() const {
if (m_cellsSet == false) {
ATH_MSG_DEBUG("Layers not built, cannot calculate rHad environment value");
}
......@@ -131,7 +131,7 @@ unsigned int LVL1::eFEXtauBDTAlgo::rHadEnv() {
// Return the bitwise value of the given Et
// See eFEXtauBaseAlgo for a first attempt at this
unsigned int LVL1::eFEXtauBDTAlgo::getBitwiseEt() {
unsigned int LVL1::eFEXtauBDTAlgo::getBitwiseEt() const {
if (m_cellsSet == false) {
ATH_MSG_DEBUG("Layers not built, cannot accurately calculate Et.");
}
......@@ -139,15 +139,15 @@ unsigned int LVL1::eFEXtauBDTAlgo::getBitwiseEt() {
return m_bdtAlgoImpl->getET();
}
unsigned int LVL1::eFEXtauBDTAlgo::getBDTScore() {
unsigned int LVL1::eFEXtauBDTAlgo::getBDTScore() const {
return m_bdtAlgoImpl->getBDTScore();
}
unsigned int LVL1::eFEXtauBDTAlgo::getBDTCondition() {
unsigned int LVL1::eFEXtauBDTAlgo::getBDTCondition() const {
return m_bdtAlgoImpl->getBDTCondition();
}
bool LVL1::eFEXtauBDTAlgo::isBDT() { return true; }
bool LVL1::eFEXtauBDTAlgo::isBDT() const { return true; }
void LVL1::eFEXtauBDTAlgo::setThresholds(
std::vector<unsigned int> rHadThreshold,
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/eTowerBuilder.cxx
+ 1
− 7
View file @ ade62a96
/*
Copyright (C) 2002-2021 CERN for the benefit of the ATLAS collaboration
Copyright (C) 2002-2023 CERN for the benefit of the ATLAS collaboration
*/
......@@ -14,12 +14,6 @@
#include "L1CaloFEXSim/eTowerContainer.h"
#include "TROOT.h"
#include "TH1.h"
#include "TH1F.h"
#include "TPad.h"
#include "TCanvas.h"
// TOWER IS A COLLECTION OF SUPER CELLS
// IT SHOULD HAVE A UNIQUE ID
// IT SHOULD BE ABLE TO RETURN LIST OF SUPER CELLS BELONGING TO IT
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/gFEXJwoJAlgo.cxx
+ 14
− 16
View file @ ade62a96
......@@ -221,7 +221,7 @@ std::vector<std::unique_ptr<gFEXJwoJTOB>> gFEXJwoJAlgo::jwojAlgo(gTowersCentral
}
void gFEXJwoJAlgo::makeFPGAC(gTowersForward twrsCN, gTowersForward twrsCP, gTowersCentral & twrsC){
void gFEXJwoJAlgo::makeFPGAC(const gTowersForward& twrsCN, const gTowersForward& twrsCP, gTowersCentral & twrsC) const {
int rows = twrsC.size();
int cols = twrsC[0].size();
......@@ -255,7 +255,7 @@ void gFEXJwoJAlgo::makeFPGAC(gTowersForward twrsCN, gTowersForward twrsCP, gTowe
void gFEXJwoJAlgo::gBlockAB(gTowersCentral twrs, gTowersCentral & gBlkSum){
void gFEXJwoJAlgo::gBlockAB(const gTowersCentral& twrs, gTowersCentral & gBlkSum) const {
int rows = twrs.size();
int cols = twrs[0].size();
......@@ -296,11 +296,11 @@ void gFEXJwoJAlgo::gBlockAB(gTowersCentral twrs, gTowersCentral & gBlkSum){
}
void gFEXJwoJAlgo::metFPGA(gTowersCentral twrs, gTowersCentral & gBlkSum, int gBlockthreshold,
void gFEXJwoJAlgo::metFPGA(const gTowersCentral& twrs, const gTowersCentral & gBlkSum, int gBlockthreshold,
float aFPGA, float bFPGA,
int & MHT_x, int & MHT_y,
int & MST_x, int & MST_y,
int & MET_x, int & MET_y){
int & MET_x, int & MET_y) const {
int rows = twrs.size();
int cols = twrs[0].size();
......@@ -319,13 +319,12 @@ void gFEXJwoJAlgo::metFPGA(gTowersCentral twrs, gTowersCentral & gBlkSum, int gB
}
MET_x = aFPGA * MHT_x + bFPGA * MST_x;
MET_y = aFPGA * MHT_y + bFPGA * MST_y;
}
void gFEXJwoJAlgo::metTotal(int A_MET_x, int A_MET_y,
int B_MET_x, int B_MET_y,
int C_MET_x, int C_MET_y,
int & MET_x, int & MET_y, int & MET){
int & MET_x, int & MET_y, int & MET) const {
MET_x = A_MET_x + B_MET_x;
MET_y = A_MET_y + B_MET_y;
......@@ -335,12 +334,11 @@ void gFEXJwoJAlgo::metTotal(int A_MET_x, int A_MET_y,
MET_y = MET_y + C_MET_y;
}
MET = sqrt((MET_x * MET_x) + (MET_y * MET_y));
MET = std::sqrt((MET_x * MET_x) + (MET_y * MET_y));
}
void gFEXJwoJAlgo::sumEtFPGA(gTowersCentral twrs, int & partial_sumEt ){
void gFEXJwoJAlgo::sumEtFPGA(const gTowersCentral& twrs, int & partial_sumEt ) const {
int rows = twrs.size();
int cols = twrs[0].size();
......@@ -352,7 +350,7 @@ void gFEXJwoJAlgo::sumEtFPGA(gTowersCentral twrs, int & partial_sumEt ){
}
}
void gFEXJwoJAlgo::sumEt(int A_sumEt, int B_sumEt, int C_sumEt, int & total_sumEt ){
void gFEXJwoJAlgo::sumEt(int A_sumEt, int B_sumEt, int C_sumEt, int & total_sumEt ) const {
total_sumEt = A_sumEt + B_sumEt;
if (FEXAlgoSpaceDefs::ENABLE_JWOJ_C){
......@@ -364,22 +362,22 @@ void gFEXJwoJAlgo::sumEt(int A_sumEt, int B_sumEt, int C_sumEt, int & total_s
//----------------------------------------------------------------------------------
// bitwise simulation of sine LUT in firmware
//----------------------------------------------------------------------------------
float gFEXJwoJAlgo::sinLUT(unsigned int phiIDX, unsigned int aw)
float gFEXJwoJAlgo::sinLUT(unsigned int phiIDX, unsigned int aw) const
{
float c = ((float)phiIDX)/pow(2,aw);
float c = static_cast<float>(phiIDX)/std::pow(2,aw);
float rad = (2*M_PI) *c;
float rsin = sin(rad);
float rsin = std::sin(rad);
return rsin;
}
//----------------------------------------------------------------------------------
// bitwise simulation cosine LUT in firmware
//----------------------------------------------------------------------------------
float gFEXJwoJAlgo::cosLUT(unsigned int phiIDX, unsigned int aw)
float gFEXJwoJAlgo::cosLUT(unsigned int phiIDX, unsigned int aw) const
{
float c = ((float)phiIDX)/pow(2,aw);
float c = static_cast<float>(phiIDX)/std::pow(2,aw);
float rad = (2*M_PI) *c;
float rcos = cos(rad);
float rcos = std::cos(rad);
return rcos;
}
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/gFEXaltMetAlgo.cxx
+ 11
− 13
View file @ ade62a96
......@@ -139,7 +139,7 @@ void gFEXaltMetAlgo::altMetAlgo(const gTowersCentral &Atwr, const gTowersCentral
void gFEXaltMetAlgo::metFPGA(const gTowersCentral &twrs, int & MET_x, int & MET_y, const unsigned short FPGA_NO){
void gFEXaltMetAlgo::metFPGA(const gTowersCentral &twrs, int & MET_x, int & MET_y, const unsigned short FPGA_NO) const {
int rows = twrs.size();
int cols = twrs[0].size();
......@@ -156,16 +156,16 @@ void gFEXaltMetAlgo::metFPGA(const gTowersCentral &twrs, int & MET_x, int & MET_
inline void gFEXaltMetAlgo::metTotal(const int A_MET_x, const int A_MET_y,
const int B_MET_x, const int B_MET_y,
int & MET_x, int & MET_y, int & MET){
int & MET_x, int & MET_y, int & MET) const {
MET_x = A_MET_x + B_MET_x;
MET_y = A_MET_y + B_MET_y;
MET = sqrt((MET_x * MET_x) + (MET_y * MET_y));
MET = std::sqrt((MET_x * MET_x) + (MET_y * MET_y));
}
//Function to calculate rho for the given set of gtowers
int gFEXaltMetAlgo::get_rho(const gTowersCentral &twrs){
int gFEXaltMetAlgo::get_rho(const gTowersCentral &twrs) const {
const int rows = twrs.size();
const int cols = twrs[0].size();
const int n{rows*cols};
......@@ -179,7 +179,7 @@ int gFEXaltMetAlgo::get_rho(const gTowersCentral &twrs){
}
//Function calculates standard deviation of the gtowers
int gFEXaltMetAlgo::get_sigma(const gTowersCentral &twrs) {
int gFEXaltMetAlgo::get_sigma(const gTowersCentral &twrs) const {
int rows = twrs.size();
int cols = twrs[0].size();
......@@ -197,8 +197,7 @@ int gFEXaltMetAlgo::get_sigma(const gTowersCentral &twrs) {
}
void gFEXaltMetAlgo::rho_MET(const gTowersCentral &twrs, int & MET_x, int & MET_y, const int rho, const int sigma) {
void gFEXaltMetAlgo::rho_MET(const gTowersCentral &twrs, int & MET_x, int & MET_y, const int rho, const int sigma) const {
int rows = twrs.size();
int cols = twrs[0].size();
......@@ -213,7 +212,7 @@ void gFEXaltMetAlgo::rho_MET(const gTowersCentral &twrs, int & MET_x, int & MET_
}
}
int gFEXaltMetAlgo::sumEtFPGAnc(const gTowersCentral &twrs, const unsigned short FPGA_NO){
int gFEXaltMetAlgo::sumEtFPGAnc(const gTowersCentral &twrs, const unsigned short FPGA_NO) const {
int partial_sumEt = 0;
const int rows = twrs.size();
......@@ -226,7 +225,7 @@ int gFEXaltMetAlgo::sumEtFPGAnc(const gTowersCentral &twrs, const unsigned short
return partial_sumEt;
}
int gFEXaltMetAlgo::sumEtFPGArms(const gTowersCentral &twrs, const int sigma){
int gFEXaltMetAlgo::sumEtFPGArms(const gTowersCentral &twrs, const int sigma) const {
int partial_sumEt = 0;
const int rows = twrs.size();
......@@ -240,17 +239,16 @@ int gFEXaltMetAlgo::sumEtFPGArms(const gTowersCentral &twrs, const int sigma){
}
int gFEXaltMetAlgo::sumEt(const int A_sumEt, const int B_sumEt){
int gFEXaltMetAlgo::sumEt(const int A_sumEt, const int B_sumEt) const {
return A_sumEt + B_sumEt;
}
//----------------------------------------------------------------------------------
// bitwise simulation of sine LUT in firmware
//----------------------------------------------------------------------------------
float gFEXaltMetAlgo::sinLUT(const unsigned int phiIDX, const unsigned int aw)
float gFEXaltMetAlgo::sinLUT(const unsigned int phiIDX, const unsigned int aw) const
{
float c = ((float)phiIDX)/std::pow(2,aw);
float rad = (2*M_PI) *c;
......@@ -262,7 +260,7 @@ float gFEXaltMetAlgo::sinLUT(const unsigned int phiIDX, const unsigned int aw)
//----------------------------------------------------------------------------------
// bitwise simulation cosine LUT in firmware
//----------------------------------------------------------------------------------
float gFEXaltMetAlgo::cosLUT(const unsigned int phiIDX, const unsigned int aw)
float gFEXaltMetAlgo::cosLUT(const unsigned int phiIDX, const unsigned int aw) const
{
float c = ((float)phiIDX)/std::pow(2,aw);
float rad = (2*M_PI) *c;
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/jFEXSmallRJetAlgo.cxx
+ 6
− 7
View file @ ade62a96
......@@ -69,13 +69,13 @@ void LVL1::jFEXSmallRJetAlgo::setup(int inputTable[7][7], int inputTableDisplace
}
//Gets the ET for the TT. This ET is EM + HAD
unsigned int LVL1::jFEXSmallRJetAlgo::getTTowerET(unsigned int TTID ) {
unsigned int LVL1::jFEXSmallRJetAlgo::getTTowerET(unsigned int TTID ) const {
if(TTID == 0) {
return 0;
}
if(m_map_Etvalues.find(TTID) != m_map_Etvalues.end()) {
return m_map_Etvalues[TTID][0];
return m_map_Etvalues.at(TTID).at(0);
}
//we shouldn't arrive here
......@@ -151,7 +151,7 @@ bool LVL1::jFEXSmallRJetAlgo::isSeedLocalMaxima() {
//in this clustering func, the central TT in jet is the parameters
unsigned int LVL1::jFEXSmallRJetAlgo::getSmallClusterET() {
unsigned int LVL1::jFEXSmallRJetAlgo::getSmallClusterET() const {
int SRJetClusterET = 0;
for(int nphi = -3; nphi< 4; nphi++) {
......@@ -166,19 +166,18 @@ unsigned int LVL1::jFEXSmallRJetAlgo::getSmallClusterET() {
}
unsigned int LVL1::jFEXSmallRJetAlgo::getSmallETRing(){
unsigned int LVL1::jFEXSmallRJetAlgo::getSmallETRing() const {
int SmallETRing = getSmallClusterET() - m_jFEXalgoSearchWindowSeedET[3][3];
return SmallETRing;
}
unsigned int LVL1::jFEXSmallRJetAlgo::getTTIDcentre(){
unsigned int LVL1::jFEXSmallRJetAlgo::getTTIDcentre() const {
return m_jFEXalgoTowerID[3][3];
}
void LVL1::jFEXSmallRJetAlgo::setFPGAEnergy(std::unordered_map<int,std::vector<int> > et_map){
void LVL1::jFEXSmallRJetAlgo::setFPGAEnergy(const std::unordered_map<int,std::vector<int> >& et_map){
m_map_Etvalues=et_map;
}
}// end of namespace LVL1
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/jFEXSysSim.cxx
+ 9
− 20
View file @ ade62a96
......@@ -97,7 +97,7 @@ namespace LVL1 {
}
void jFEXSysSim::init() {
void jFEXSysSim::init() const {
}
......@@ -109,10 +109,9 @@ namespace LVL1 {
}
int jFEXSysSim::calcTowerID(int eta, int phi, int mod) {
int jFEXSysSim::calcTowerID(int eta, int phi, int mod) const {
return ((64*eta) + phi + mod);
}
StatusCode jFEXSysSim::execute(jFEXOutputCollection* inputOutputCollection) {
......@@ -1099,7 +1098,7 @@ namespace LVL1 {
}
StatusCode jFEXSysSim::fillSRJetEDM(uint8_t jFexNum, uint8_t fpgaNumber, uint32_t tobWord, char istob, int resolution, float_t eta, float_t phi, std::unique_ptr< xAOD::jFexSRJetRoIContainer > &jContainer) {
StatusCode jFEXSysSim::fillSRJetEDM(uint8_t jFexNum, uint8_t fpgaNumber, uint32_t tobWord, char istob, int resolution, float_t eta, float_t phi, std::unique_ptr< xAOD::jFexSRJetRoIContainer > &jContainer) const {
xAOD::jFexSRJetRoI* my_EDM = new xAOD::jFexSRJetRoI();
jContainer->push_back( my_EDM );
......@@ -1109,11 +1108,10 @@ namespace LVL1 {
ATH_MSG_DEBUG(" setting SRJet jFEX Number: " << +my_EDM->jFexNumber() << " et: " << my_EDM->et() << " eta: " << my_EDM->eta() <<" / "<< eta << " phi: " << my_EDM->phi()<<" / "<< phi );
return StatusCode::SUCCESS;
}
StatusCode jFEXSysSim::fillTauEDM(uint8_t jFexNum,uint8_t fpgaNumber, uint32_t tobWord, char istob, int resolution, float_t eta, float_t phi, std::unique_ptr< xAOD::jFexTauRoIContainer > &jContainer) {
StatusCode jFEXSysSim::fillTauEDM(uint8_t jFexNum,uint8_t fpgaNumber, uint32_t tobWord, char istob, int resolution, float_t eta, float_t phi, std::unique_ptr< xAOD::jFexTauRoIContainer > &jContainer) const {
xAOD::jFexTauRoI* my_EDM = new xAOD::jFexTauRoI();
jContainer->push_back( my_EDM );
......@@ -1123,10 +1121,9 @@ namespace LVL1 {
ATH_MSG_DEBUG(" setting tau jFEX Number: " << +my_EDM->jFexNumber() << " et: " << my_EDM->et() << " eta: " << my_EDM->eta() <<" / "<< eta << " phi: " << my_EDM->phi()<<" / "<< phi );
return StatusCode::SUCCESS;
}
StatusCode jFEXSysSim::fillFwdElEDM(uint8_t jFexNum,uint8_t fpgaNumber, uint32_t tobWord, char istob, int resolution, float_t eta, float_t phi, std::unique_ptr< xAOD::jFexFwdElRoIContainer > &jContainer) {
StatusCode jFEXSysSim::fillFwdElEDM(uint8_t jFexNum,uint8_t fpgaNumber, uint32_t tobWord, char istob, int resolution, float_t eta, float_t phi, std::unique_ptr< xAOD::jFexFwdElRoIContainer > &jContainer) const {
xAOD::jFexFwdElRoI* my_EDM = new xAOD::jFexFwdElRoI();
jContainer->push_back( my_EDM );
......@@ -1136,12 +1133,9 @@ namespace LVL1 {
ATH_MSG_DEBUG(" setting Forward Elec jFEX Number: " << +my_EDM->jFexNumber() << " et: " << my_EDM->et() << " eta: " << my_EDM->eta() <<" / "<< eta << " phi: " << my_EDM->phi()<<" / "<< phi );
return StatusCode::SUCCESS;
}
StatusCode jFEXSysSim::fillLRJetEDM(uint8_t jFexNum, uint8_t fpgaNumber, uint32_t tobWord, char istob, int resolution, float_t eta, float_t phi, std::unique_ptr< xAOD::jFexLRJetRoIContainer > &jContainer) {
StatusCode jFEXSysSim::fillLRJetEDM(uint8_t jFexNum, uint8_t fpgaNumber, uint32_t tobWord, char istob, int resolution, float_t eta, float_t phi, std::unique_ptr< xAOD::jFexLRJetRoIContainer > &jContainer) const {
xAOD::jFexLRJetRoI* my_EDM = new xAOD::jFexLRJetRoI();
jContainer->push_back( my_EDM );
......@@ -1151,10 +1145,9 @@ namespace LVL1 {
ATH_MSG_DEBUG(" setting LRJet jFEX Number: " << +my_EDM->jFexNumber() << " et: " << my_EDM->et() << " eta: " << my_EDM->eta() <<" / "<< eta << " phi: " << my_EDM->phi()<<" / "<< phi );
return StatusCode::SUCCESS;
}
StatusCode jFEXSysSim::fillSumEtEDM(uint8_t jFexNum,uint8_t fpgaNumber, uint32_t tobWord, int resolution, std::unique_ptr< xAOD::jFexSumETRoIContainer > &jContainer) {
StatusCode jFEXSysSim::fillSumEtEDM(uint8_t jFexNum,uint8_t fpgaNumber, uint32_t tobWord, int resolution, std::unique_ptr< xAOD::jFexSumETRoIContainer > &jContainer) const {
xAOD::jFexSumETRoI* my_EDM = new xAOD::jFexSumETRoI();
jContainer->push_back( my_EDM );
......@@ -1164,10 +1157,9 @@ namespace LVL1 {
ATH_MSG_DEBUG(" setting SumET jFEX Number: " << +my_EDM->jFexNumber() << " Et_up: " << my_EDM->tobEt_upper() << " Et_down: " << my_EDM->tobEt_lower() << " sat_up: " << my_EDM->tobSat_upper()<< " sat_low: " << my_EDM->tobSat_lower());
return StatusCode::SUCCESS;
}
}
StatusCode jFEXSysSim::fillMetEDM(uint8_t jFexNum,uint8_t fpgaNumber, uint32_t tobWord, int resolution, std::unique_ptr< xAOD::jFexMETRoIContainer > &jContainer) {
StatusCode jFEXSysSim::fillMetEDM(uint8_t jFexNum,uint8_t fpgaNumber, uint32_t tobWord, int resolution, std::unique_ptr< xAOD::jFexMETRoIContainer > &jContainer) const {
xAOD::jFexMETRoI* my_EDM = new xAOD::jFexMETRoI();
jContainer->push_back( my_EDM );
......@@ -1177,11 +1169,8 @@ namespace LVL1 {
ATH_MSG_DEBUG(" setting MET jFEX Number: " << +my_EDM->jFexNumber() << " Et_x: " << my_EDM->tobEx() << " Et_y: " << my_EDM->tobEy() << " sat: " << my_EDM->tobSat()<< " res: " << my_EDM->tobRes() );
return StatusCode::SUCCESS;
}
} // end of namespace bracket
Trigger/TrigT1/L1CaloFEX/L1CaloFEXSim/src/jFEXsumETAlgo.cxx
+ 1
− 2
View file @ ade62a96
......@@ -38,7 +38,7 @@ StatusCode LVL1::jFEXsumETAlgo::initialize() {
}
//calls container for TT
StatusCode LVL1::jFEXsumETAlgo::safetyTest() {
StatusCode LVL1::jFEXsumETAlgo::safetyTest() const {
SG::ReadHandle<jTowerContainer> jTowerContainer(m_jTowerContainerKey);
if(! jTowerContainer.isValid()) {
......@@ -174,7 +174,6 @@ int LVL1::jFEXsumETAlgo::getTTowerET(unsigned int TTID ) {
//we shouldn't arrive here
return 0;
}
......
Trigger/TrigT1/L1CaloFEX/L1CaloFEXToolInterfaces/L1CaloFEXToolInterfaces/IeFEXtauAlgo.h
+ 17
− 17
View file @ ade62a96
......@@ -32,25 +32,25 @@ Interface definition for eFEXtauAlgo
virtual void setup(int inputTable[3][3], int efex_id, int fpga_id, int central_eta) = 0;
virtual void compute() = 0;
virtual bool isCentralTowerSeed() = 0;
virtual std::unique_ptr<eFEXtauTOB> getTauTOB() = 0;
virtual unsigned int rCoreCore() = 0;
virtual unsigned int rCoreEnv() = 0;
virtual void getRCore(std::vector<unsigned int> & rCoreVec) = 0;
virtual float getRealRCore() = 0;
virtual unsigned int rHadCore() = 0;
virtual unsigned int rHadEnv() = 0;
virtual void getRHad(std::vector<unsigned int> & rHadVec) = 0;
virtual float getRealRHad() = 0;
virtual unsigned int getEt() = 0;
virtual unsigned int getBitwiseEt() = 0;
virtual bool getUnD() = 0;
virtual unsigned int getSeed() = 0;
virtual bool isCentralTowerSeed() const = 0;
virtual std::unique_ptr<eFEXtauTOB> getTauTOB() const = 0;
virtual unsigned int rCoreCore() const = 0;
virtual unsigned int rCoreEnv() const = 0;
virtual void getRCore(std::vector<unsigned int> & rCoreVec) const = 0;
virtual float getRealRCore() const = 0;
virtual unsigned int rHadCore() const = 0;
virtual unsigned int rHadEnv() const = 0;
virtual void getRHad(std::vector<unsigned int> & rHadVec) const = 0;
virtual float getRealRHad() const = 0;
virtual unsigned int getEt() const = 0;
virtual unsigned int getBitwiseEt() const = 0;
virtual bool getUnD() const = 0;
virtual unsigned int getSeed() const = 0;
virtual void getSums(unsigned int seed, bool UnD, std::vector<unsigned int> & RcoreSums,
std::vector<unsigned int> & RemSums) = 0;
virtual unsigned int getBDTScore() = 0;
virtual unsigned int getBDTCondition() = 0;
virtual bool isBDT() = 0;
virtual unsigned int getBDTScore() const = 0;
virtual unsigned int getBDTCondition() const = 0;
virtual bool isBDT() const = 0;
virtual void setThresholds(std::vector<unsigned int> rHadThreshold, std::vector<unsigned int> bdtThreshold, unsigned int etThreshold, unsigned int etThresholdForRHad) = 0;
private:
......
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