Skip to content
Snippets Groups Projects
Commit b4548f4a authored by Whitmaur Robert Castiglioni's avatar Whitmaur Robert Castiglioni
Browse files

sh files had maps pointed to most current maps

map cxx files changed so warings don't show
 Changes to be committed:
	modified:   Trigger/EFTracking/FPGATrackSim/FPGATrackSimConfTools/test/FPGATrackSimWorkflow/FPGATrackSimAnalysisOnWrapper.sh
	modified:   Trigger/EFTracking/FPGATrackSim/FPGATrackSimConfTools/test/FPGATrackSimWorkflow/FPGATrackSimBankGeneration.sh
	modified:   Trigger/EFTracking/FPGATrackSim/FPGATrackSimConfTools/test/FPGATrackSimWorkflow/FPGATrackSimConstGeneration.sh
	modified:   Trigger/EFTracking/FPGATrackSim/FPGATrackSimConfTools/test/FPGATrackSimWorkflow/FPGATrackSimConversionOnRDO.sh
	modified:   Trigger/EFTracking/FPGATrackSim/FPGATrackSimConfTools/test/FPGATrackSimWorkflow/FPGATrackSimDataPrepOnRDO.sh
	modified:   Trigger/EFTracking/FPGATrackSim/FPGATrackSimInput/FPGATrackSimInput/FPGATrackSimRawToLogicalHitsTool.h
	modified:   Trigger/EFTracking/FPGATrackSim/FPGATrackSimMaps/src/FPGATrackSimMappingSvc.cxx
	modified:   Trigger/EFTracking/FPGATrackSim/FPGATrackSimMaps/src/FPGATrackSimRegionMap.cxx
parent 5298a192
No related branches found
No related tags found
15 merge requests!78241Draft: FPGATrackSim: GenScan code refactor,!78236Draft: Switching Streams https://its.cern.ch/jira/browse/ATR-27417,!78056AFP monitoring: new synchronization and cleaning,!78041AFP monitoring: new synchronization and cleaning,!77990Updating TRT chip masks for L1TRT trigger simulation - ATR-28372,!77731Draft: Updates to ZDC reconstruction,!77728Draft: updates to ZDC reconstruction,!77522Draft: sTGC Pad Trigger Emulator,!76725ZdcNtuple: Fix cppcheck warning.,!76611L1CaloFEXByteStream: Fix out-of-bounds array accesses.,!76475Punchthrough AF3 implementation in FastG4,!76474Punchthrough AF3 implementation in FastG4,!76343Draft: MooTrackBuilder: Recalibrate NSW hits in refine method,!75127Draft: Seeder types rebase2 grid fix,!73952Multiple pmap Intergration
Showing
with 15 additions and 11 deletions
......@@ -8,7 +8,7 @@ WRP_EVT=200
WRAPPER="/cvmfs/atlas-nightlies.cern.ch/repo/data/data-art/PhaseIIUpgrade/EFTracking/${GEO_TAG}/Wrappers/v0.10/FPGATrackSimWrapper.root"
BANKS="/cvmfs/atlas-nightlies.cern.ch/repo/data/data-art/PhaseIIUpgrade/EFTracking/${GEO_TAG}/banks_9L/v0.10/"
MAPS="maps_9L/OtherFPGAPipelines/v0.10/"
MAPS="maps_9L/OtherFPGAPipelines/v0.20/"
echo "... analysis on wrapper"
......
......@@ -6,8 +6,8 @@ export CALIBPATH=/cvmfs/atlas-nightlies.cern.ch/repo/data/data-art/PhaseIIUpgrad
RDO="/cvmfs/atlas-nightlies.cern.ch/repo/data/data-art/PhaseIIUpgrade/EFTracking/${GEO_TAG}/RDO/reg0_singlemu.root"
RDO_EVT=200
MAPS="maps_9L/"
#MAPS="maps_9L/"
MAPS="maps_9L/OtherFPGAPipelines/v0.20"
echo "... Banks generation"
python -m FPGATrackSimBankGen.FPGATrackSimBankGenConfig \
......
......@@ -5,7 +5,8 @@ GEO_TAG="ATLAS-P2-RUN4-03-00-00"
export CALIBPATH=/cvmfs/atlas-nightlies.cern.ch/repo/data/data-art/PhaseIIUpgrade/EFTracking/${GEO_TAG}/:$CALIBPATH
COMBINED_MATRIX="/cvmfs/atlas-nightlies.cern.ch/repo/data/data-art/PhaseIIUpgrade/EFTracking/${GEO_TAG}/banks_9L/combined_matrix.root"
MAPS="maps_9L/"
#MAPS="maps_9L/"
MAPS="maps_9L/OtherFPGAPipelines/v0.20"
echo "... const generation on combined matrix file"
python -m FPGATrackSimBankGen.FPGATrackSimBankConstGenConfig \
......
......@@ -10,7 +10,8 @@ RDO="/cvmfs/atlas-nightlies.cern.ch/repo/data/data-art/PhaseIIUpgrade/EFTracking
# RDO="/cvmfs/atlas-nightlies.cern.ch/repo/data/data-art/PhaseIIUpgrade/RDO/${GEO_TAG}/mc21_14TeV.601229.PhPy8EG_A14_ttbar_hdamp258p75_SingleLep.recon.RDO.e8481_s4149_r14700/RDO.33629020._000047.pool.root.1"
RDO_EVT=200
BANKS="/cvmfs/atlas-nightlies.cern.ch/repo/data/data-art/PhaseIIUpgrade/EFTracking/${GEO_TAG}/banks_9L/"
MAPS="maps_9L/"
#MAPS="maps_9L/"
MAPS="maps_9L/OtherFPGAPipelines/v0.20"
echo "... analysis on RDO"
python -m FPGATrackSimConfTools.FPGATrackSimAnalysisConfig \
......
......@@ -5,7 +5,7 @@ GEO_TAG="ATLAS-P2-RUN4-03-00-00"
RDO="/cvmfs/atlas-nightlies.cern.ch/repo/data/data-art/PhaseIIUpgrade/EFTracking/${GEO_TAG}/RDO/reg0_singlemu.root"
# instructions on how to change version of files can be found in https://twiki.cern.ch/twiki/bin/view/Atlas/EFTrackingSoftware
MAP_VERSION="v0.10"
MAP_VERSION="v0.20"
export CALIBPATH=/cvmfs/atlas-nightlies.cern.ch/repo/data/data-art/PhaseIIUpgrade/EFTracking/${GEO_TAG}/:$CALIBPATH
MAPS="maps_9L/OtherFPGAPipelines/${MAP_VERSION}/"
if [ -z $1 ]; then
......
......@@ -29,7 +29,7 @@ class FPGATrackSimRawToLogicalHitsTool : public AthAlgTool
StatusCode convert(unsigned stage, const FPGATrackSimEventInputHeader& header,
FPGATrackSimLogicalEventInputHeader& logicheader);
StatusCode getUnmapped(std::vector<FPGATrackSimHit>& missing_hits);
const FPGATrackSimPlaneMap* getPlaneMap_1st(int sliceNum);
......@@ -43,6 +43,8 @@ private:
// internal members
std::vector<int> m_towers;
std::vector<FPGATrackSimHit> m_missing_hits;// vector to save hits not mapped, debugging only
std::vector<int> m_missing_hit_codes; // for histograms used in debugging
};
......
......@@ -34,9 +34,9 @@ StatusCode FPGATrackSimMappingSvc::checkAllocs()
}
if (!m_numberOfPmaps)
ATH_MSG_FATAL("Error with declared number of plane maps: " << m_pmap_path);
if (m_numberOfPmaps != m_pmap_vector_1st.size())
if (m_numberOfPmaps != int(m_pmap_vector_1st.size()))
ATH_MSG_FATAL("Error using number of declared plane maps does not equal number of loaded plane maps: " << m_pmap_path<<"=/="<<m_pmap_vector_1st.size());
for (int a = 0 ; a < m_pmap_vector_1st.size() ;a++)
for (int a = 0 ; a < int(m_pmap_vector_1st.size()) ;a++)
{
if(!m_pmap_vector_1st.at(a))
ATH_MSG_FATAL("Error using 1st stage plane map for slice: " << a <<" of "<< m_pmap_vector_1st.size());
......
......@@ -59,7 +59,7 @@ void FPGATrackSimRegionMap::allocateMap(ifstream & fin)
ok = ok && (sline >> towerKey >> m_nregions);
ok = ok && (towerKey == "towers");
if((m_filepath.size()-7)==m_filepath.find("subrmap")){
if(m_pmaps.size()!= m_nregions){
if(int(m_pmaps.size())!= m_nregions){
ANA_MSG_FATAL("Error Pmap slice size does not match Rmap: PMAP_SIZE:"<<m_pmaps.size()<<" RMAP_SIZE:"<<m_nregions);
throw ("Pmap slice size does not match Rmap:" );
}
......@@ -70,7 +70,7 @@ void FPGATrackSimRegionMap::allocateMap(ifstream & fin)
m_map.resize(m_nregions);
for (int iRegion=0; iRegion<m_map.size(); iRegion++)
for (int iRegion=0; iRegion<int(m_map.size()); iRegion++)
{
m_map.at(iRegion).resize(m_pmaps.at(0)->getNLogiLayers());
for (size_t l = 0; l < m_map.at(iRegion).size(); l++) m_map.at(iRegion).at(l).resize(m_pmaps.at(iRegion)->getNSections(l));
......
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment